arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 1 | #define ASSEMBLY 1 |
Myles Watson | 1d6d45e | 2009-11-06 17:02:51 +0000 | [diff] [blame] | 2 | #define __PRE_RAM__ |
Stefan Reinauer | 806e146 | 2005-12-01 10:54:44 +0000 | [diff] [blame] | 3 | |
| 4 | //used by raminit |
Yinghai Lu | 6d74d76 | 2006-10-04 23:57:49 +0000 | [diff] [blame] | 5 | #define QRANK_DIMM_SUPPORT 1 |
Stefan Reinauer | 806e146 | 2005-12-01 10:54:44 +0000 | [diff] [blame] | 6 | |
| 7 | #if CONFIG_LOGICAL_CPUS==1 |
| 8 | #define SET_NB_CFG_54 1 |
| 9 | #endif |
| 10 | |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 11 | #include <stdint.h> |
Patrick Georgi | 12aba82 | 2009-04-30 07:07:22 +0000 | [diff] [blame] | 12 | #include <string.h> |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 13 | #include <device/pci_def.h> |
| 14 | #include <arch/io.h> |
| 15 | #include <device/pnp_def.h> |
| 16 | #include <arch/romcc_io.h> |
| 17 | #include <cpu/x86/lapic.h> |
| 18 | #include "option_table.h" |
| 19 | #include "pc80/mc146818rtc_early.c" |
| 20 | #include "pc80/serial.c" |
| 21 | #include "arch/i386/lib/console.c" |
Stefan Reinauer | c13093b | 2009-09-23 18:51:03 +0000 | [diff] [blame] | 22 | #include "lib/ramtest.c" |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 23 | |
Stefan Reinauer | 373511b | 2005-12-02 23:16:01 +0000 | [diff] [blame] | 24 | #include <cpu/amd/model_fxx_rev.h> |
Yinghai Lu | 6d74d76 | 2006-10-04 23:57:49 +0000 | [diff] [blame] | 25 | |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 26 | #include "northbridge/amd/amdk8/incoherent_ht.c" |
| 27 | #include "southbridge/nvidia/ck804/ck804_early_smbus.c" |
| 28 | #include "northbridge/amd/amdk8/raminit.h" |
| 29 | #include "cpu/amd/model_fxx/apic_timer.c" |
| 30 | #include "lib/delay.c" |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 31 | #include "cpu/x86/lapic/boot_cpu.c" |
| 32 | #include "northbridge/amd/amdk8/reset_test.c" |
| 33 | #include "northbridge/amd/amdk8/debug.c" |
| 34 | #include "superio/winbond/w83627hf/w83627hf_early_serial.c" |
| 35 | |
| 36 | #include "cpu/amd/mtrr/amd_earlymtrr.c" |
| 37 | #include "cpu/x86/bist.h" |
| 38 | |
| 39 | #include "northbridge/amd/amdk8/setup_resource_map.c" |
| 40 | |
| 41 | #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) |
| 42 | |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 43 | static void memreset_setup(void) |
| 44 | { |
| 45 | } |
| 46 | |
| 47 | static void memreset(int controllers, const struct mem_controller *ctrl) |
| 48 | { |
| 49 | } |
| 50 | |
| 51 | static inline void activate_spd_rom(const struct mem_controller *ctrl) |
| 52 | { |
| 53 | /* nothing to do */ |
| 54 | } |
| 55 | |
| 56 | static inline int spd_read_byte(unsigned device, unsigned address) |
| 57 | { |
| 58 | return smbus_read_byte(device, address); |
| 59 | } |
| 60 | |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 61 | #include "northbridge/amd/amdk8/raminit.c" |
| 62 | #include "northbridge/amd/amdk8/coherent_ht.c" |
Stefan Reinauer | c13093b | 2009-09-23 18:51:03 +0000 | [diff] [blame] | 63 | #include "lib/generic_sdram.c" |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 64 | |
| 65 | /* tyan does not want the default */ |
Myles Watson | a67c354c | 2008-09-18 15:30:42 +0000 | [diff] [blame] | 66 | #include "resourcemap.c" |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 67 | |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 68 | #include "cpu/amd/dualcore/dualcore.c" |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 69 | |
| 70 | #define CK804_NUM 1 |
| 71 | #include "southbridge/nvidia/ck804/ck804_early_setup_ss.h" |
| 72 | #include "southbridge/nvidia/ck804/ck804_early_setup.c" |
| 73 | |
| 74 | #include "cpu/amd/car/copy_and_run.c" |
| 75 | |
Stefan Reinauer | 806e146 | 2005-12-01 10:54:44 +0000 | [diff] [blame] | 76 | #include "cpu/amd/car/post_cache_as_ram.c" |
| 77 | |
| 78 | #include "cpu/amd/model_fxx/init_cpus.c" |
| 79 | |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 80 | #include "southbridge/nvidia/ck804/ck804_enable_rom.c" |
| 81 | #include "northbridge/amd/amdk8/early_ht.c" |
| 82 | |
| 83 | static void sio_setup(void) |
| 84 | { |
| 85 | |
Myles Watson | a67c354c | 2008-09-18 15:30:42 +0000 | [diff] [blame] | 86 | unsigned value; |
| 87 | uint32_t dword; |
| 88 | uint8_t byte; |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 89 | |
Myles Watson | a67c354c | 2008-09-18 15:30:42 +0000 | [diff] [blame] | 90 | /* subject decoding*/ |
| 91 | byte = pci_read_config8(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0x7b); |
| 92 | byte |= 0x20; |
| 93 | pci_write_config8(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0x7b, byte); |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 94 | |
Myles Watson | a67c354c | 2008-09-18 15:30:42 +0000 | [diff] [blame] | 95 | /* LPC Positive Decode 0 */ |
| 96 | dword = pci_read_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0xa0); |
| 97 | /* Serial 0, Serial 1 */ |
| 98 | dword |= (1<<0) | (1<<1); |
| 99 | pci_write_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0xa0, dword); |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 100 | |
Myles Watson | a67c354c | 2008-09-18 15:30:42 +0000 | [diff] [blame] | 101 | #if 1 |
| 102 | /* s2891 has onboard LPC port 80 */ |
| 103 | /*Hope I can enable port 80 here |
| 104 | It will decode port 80 to LPC, If you are using PCI post code you can not do this */ |
| 105 | dword = pci_read_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0xa4); |
| 106 | dword |= (1<<16); |
| 107 | pci_write_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0xa4, dword); |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 108 | |
| 109 | #endif |
| 110 | |
| 111 | } |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 112 | |
Stefan Reinauer | 806e146 | 2005-12-01 10:54:44 +0000 | [diff] [blame] | 113 | void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 114 | { |
Stefan Reinauer | 806e146 | 2005-12-01 10:54:44 +0000 | [diff] [blame] | 115 | static const uint16_t spd_addr [] = { |
Myles Watson | a67c354c | 2008-09-18 15:30:42 +0000 | [diff] [blame] | 116 | (0xa<<3)|0, (0xa<<3)|2, 0, 0, |
| 117 | (0xa<<3)|1, (0xa<<3)|3, 0, 0, |
Stefan Reinauer | 806e146 | 2005-12-01 10:54:44 +0000 | [diff] [blame] | 118 | #if CONFIG_MAX_PHYSICAL_CPUS > 1 |
Myles Watson | a67c354c | 2008-09-18 15:30:42 +0000 | [diff] [blame] | 119 | (0xa<<3)|4, (0xa<<3)|6, 0, 0, |
| 120 | (0xa<<3)|5, (0xa<<3)|7, 0, 0, |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 121 | #endif |
| 122 | }; |
| 123 | |
Myles Watson | a67c354c | 2008-09-18 15:30:42 +0000 | [diff] [blame] | 124 | int needs_reset; |
| 125 | unsigned bsp_apicid = 0; |
Stefan Reinauer | 806e146 | 2005-12-01 10:54:44 +0000 | [diff] [blame] | 126 | |
Myles Watson | a67c354c | 2008-09-18 15:30:42 +0000 | [diff] [blame] | 127 | struct mem_controller ctrl[8]; |
| 128 | unsigned nodes; |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 129 | |
Patrick Georgi | 2bd9100 | 2010-03-18 16:46:50 +0000 | [diff] [blame^] | 130 | if (!cpu_init_detectedx && boot_cpu()) { |
Patrick Georgi | 776b85b | 2010-03-18 16:18:58 +0000 | [diff] [blame] | 131 | /* Nothing special needs to be done to find bus 0 */ |
| 132 | /* Allow the HT devices to be found */ |
| 133 | |
| 134 | enumerate_ht_chain(); |
| 135 | |
| 136 | sio_setup(); |
| 137 | |
| 138 | /* Setup the ck804 */ |
| 139 | ck804_enable_rom(); |
| 140 | } |
| 141 | |
Myles Watson | a67c354c | 2008-09-18 15:30:42 +0000 | [diff] [blame] | 142 | if (bist == 0) { |
| 143 | bsp_apicid = init_cpus(cpu_init_detectedx); |
| 144 | } |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 145 | |
Yinghai Lu | 6d74d76 | 2006-10-04 23:57:49 +0000 | [diff] [blame] | 146 | // post_code(0x32); |
Myles Watson | a67c354c | 2008-09-18 15:30:42 +0000 | [diff] [blame] | 147 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 148 | w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); |
Myles Watson | a67c354c | 2008-09-18 15:30:42 +0000 | [diff] [blame] | 149 | uart_init(); |
| 150 | console_init(); |
| 151 | |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 152 | /* Halt if there was a built in self test failure */ |
| 153 | report_bist_failure(bist); |
| 154 | |
Myles Watson | a67c354c | 2008-09-18 15:30:42 +0000 | [diff] [blame] | 155 | setup_s2891_resource_map(); |
Yinghai Lu | 6d74d76 | 2006-10-04 23:57:49 +0000 | [diff] [blame] | 156 | #if 0 |
Myles Watson | a67c354c | 2008-09-18 15:30:42 +0000 | [diff] [blame] | 157 | dump_pci_device(PCI_DEV(0, 0x18, 0)); |
Yinghai Lu | 6d74d76 | 2006-10-04 23:57:49 +0000 | [diff] [blame] | 158 | dump_pci_device(PCI_DEV(0, 0x19, 0)); |
| 159 | #endif |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 160 | |
| 161 | needs_reset = setup_coherent_ht_domain(); |
Yinghai Lu | 7ac38a3 | 2006-05-04 01:05:22 +0000 | [diff] [blame] | 162 | |
Myles Watson | a67c354c | 2008-09-18 15:30:42 +0000 | [diff] [blame] | 163 | wait_all_core0_started(); |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 164 | #if CONFIG_LOGICAL_CPUS==1 |
Myles Watson | a67c354c | 2008-09-18 15:30:42 +0000 | [diff] [blame] | 165 | // It is said that we should start core1 after all core0 launched |
| 166 | start_other_cores(); |
| 167 | wait_all_other_cores_started(bsp_apicid); |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 168 | #endif |
Stefan Reinauer | 806e146 | 2005-12-01 10:54:44 +0000 | [diff] [blame] | 169 | |
Myles Watson | a67c354c | 2008-09-18 15:30:42 +0000 | [diff] [blame] | 170 | needs_reset |= ht_setup_chains_x(); |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 171 | |
Myles Watson | a67c354c | 2008-09-18 15:30:42 +0000 | [diff] [blame] | 172 | needs_reset |= ck804_early_setup_x(); |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 173 | |
Myles Watson | a67c354c | 2008-09-18 15:30:42 +0000 | [diff] [blame] | 174 | if (needs_reset) { |
Myles Watson | b0575d8 | 2009-10-14 02:38:24 +0000 | [diff] [blame] | 175 | printk_info("ht reset -\r\n"); |
| 176 | soft_reset(); |
Myles Watson | a67c354c | 2008-09-18 15:30:42 +0000 | [diff] [blame] | 177 | } |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 178 | |
Myles Watson | a67c354c | 2008-09-18 15:30:42 +0000 | [diff] [blame] | 179 | allow_all_aps_stop(bsp_apicid); |
Stefan Reinauer | 806e146 | 2005-12-01 10:54:44 +0000 | [diff] [blame] | 180 | |
Myles Watson | a67c354c | 2008-09-18 15:30:42 +0000 | [diff] [blame] | 181 | nodes = get_nodes(); |
| 182 | //It's the time to set ctrl now; |
| 183 | fill_mem_ctrl(nodes, ctrl, spd_addr); |
Stefan Reinauer | 806e146 | 2005-12-01 10:54:44 +0000 | [diff] [blame] | 184 | |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 185 | enable_smbus(); |
Yinghai Lu | 6d74d76 | 2006-10-04 23:57:49 +0000 | [diff] [blame] | 186 | #if 0 |
| 187 | dump_spd_registers(&cpu[0]); |
| 188 | #endif |
| 189 | #if 0 |
| 190 | dump_smbus_registers(); |
| 191 | #endif |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 192 | |
| 193 | memreset_setup(); |
Stefan Reinauer | 806e146 | 2005-12-01 10:54:44 +0000 | [diff] [blame] | 194 | sdram_initialize(nodes, ctrl); |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 195 | |
Yinghai Lu | 6d74d76 | 2006-10-04 23:57:49 +0000 | [diff] [blame] | 196 | #if 0 |
Myles Watson | a67c354c | 2008-09-18 15:30:42 +0000 | [diff] [blame] | 197 | print_pci_devices(); |
Yinghai Lu | 6d74d76 | 2006-10-04 23:57:49 +0000 | [diff] [blame] | 198 | #endif |
| 199 | |
| 200 | #if 0 |
| 201 | dump_pci_devices(); |
| 202 | #endif |
| 203 | |
Yinghai Lu | 9a791df | 2006-04-03 20:38:34 +0000 | [diff] [blame] | 204 | post_cache_as_ram(); |
arch import user (historical) | 6ca7636 | 2005-07-06 17:17:25 +0000 | [diff] [blame] | 205 | } |