Leo Chou | fdeebb7 | 2024-06-11 16:23:33 +0800 | [diff] [blame] | 1 | fw_config |
| 2 | field WWAN 3 4 |
| 3 | option LTE_ABSENT 0 |
| 4 | option LTE_PRESENT 1 |
| 5 | end |
Leo Chou | 4cd7585 | 2024-06-11 17:23:51 +0800 | [diff] [blame] | 6 | field WIFI_SAR_ID 12 15 |
| 7 | option WIFI_SAR_TABLE_AX211 0 |
| 8 | end |
Leo Chou | fdeebb7 | 2024-06-11 16:23:33 +0800 | [diff] [blame] | 9 | end |
| 10 | |
Leo Chou | f2492c3 | 2024-03-20 11:42:09 +0800 | [diff] [blame] | 11 | chip soc/intel/alderlake |
Leo Chou | e79d97b | 2024-04-03 15:06:30 +0800 | [diff] [blame] | 12 | # Acoustic settings |
| 13 | register "acoustic_noise_mitigation" = "1" |
| 14 | register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" |
| 15 | register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8" |
| 16 | register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" |
| 17 | register "fast_pkg_c_ramp_disable[VR_DOMAIN_GT]" = "1" |
| 18 | register "PreWake" = "100" |
Leo Chou | f2492c3 | 2024-03-20 11:42:09 +0800 | [diff] [blame] | 19 | |
Leo Chou | e79d97b | 2024-04-03 15:06:30 +0800 | [diff] [blame] | 20 | register "sagv" = "SaGv_Enabled" |
Leo Chou | f2492c3 | 2024-03-20 11:42:09 +0800 | [diff] [blame] | 21 | |
Roger Wang | 2f2ceef | 2024-05-22 14:18:33 +0800 | [diff] [blame] | 22 | # EMMC Tx CMD Delay |
| 23 | # Refer to EDS-Vol2-42.3.7. |
| 24 | # [14:8] steps of delay for DDR mode, each 125ps, range: 0 - 39, total 625ps. |
| 25 | # [6:0] steps of delay for SDR mode, each 125ps, range: 0 - 39, total 625ps. |
| 26 | register "common_soc_config.emmc_dll.emmc_tx_cmd_cntl" = "0x505" |
| 27 | |
| 28 | # EMMC TX DATA Delay 1 |
| 29 | # Refer to EDS-Vol2-42.3.8. |
| 30 | # [14:8] steps of delay for HS400, each 125ps, range: 0 - 78, total 465ps. |
| 31 | # [6:0] steps of delay for SDR104/HS200, each 125ps, range: 0 - 79, total 465ps. |
| 32 | register "common_soc_config.emmc_dll.emmc_tx_data_cntl1" = "0x909" |
| 33 | |
| 34 | # EMMC TX DATA Delay 2 |
| 35 | # Refer to EDS-Vol2-42.3.9. |
| 36 | # [30:24] steps of delay for SDR50, each 125ps, range: 0 - 79, total 3500ps. |
| 37 | # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78, total 5250ps. |
| 38 | # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 -79, total 5000ps. |
| 39 | # [6:0] steps of delay for SDR12, each 125ps. Range: 0 - 79, total 5000ps. |
| 40 | register "common_soc_config.emmc_dll.emmc_tx_data_cntl2" = "0x1C2A2828" |
| 41 | |
| 42 | # EMMC RX CMD/DATA Delay 1 |
| 43 | # Refer to EDS-Vol2-42.3.10. |
| 44 | # [30:24] steps of delay for SDR50, each 125ps, range: 0 - 119, total 3500ps. |
| 45 | # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78, total 3375ps. |
| 46 | # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 - 119, total 3250ps. |
| 47 | # [6:0] steps of delay for SDR12, each 125ps, range: 0 - 119, total 3375ps. |
| 48 | register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C1B1A1B" |
| 49 | |
| 50 | # EMMC RX CMD/DATA Delay 2 |
| 51 | # Refer to EDS-Vol2-42.3.12. |
| 52 | # [17:16] stands for Rx Clock before Output Buffer, |
| 53 | # 00: Rx clock after output buffer, |
| 54 | # 01: Rx clock before output buffer, |
| 55 | # 10: Automatic selection based on working mode. |
| 56 | # 11: Reserved |
| 57 | # [14:8] steps of delay for Auto Tuning Mode, each 125ps, range: 0 - 39, total 0ps. |
| 58 | # [6:0] steps of delay for HS200, each 125ps, range: 0 - 79, total 5000ps. |
| 59 | register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x10028" |
| 60 | |
| 61 | # EMMC Rx Strobe Delay |
| 62 | # Refer to EDS-Vol2-42.3.11. |
| 63 | # [14:8] Rx Strobe Delay DLL 1 (HS400 Mode), each 125ps, range: 0 - 39, total 2625ps. |
| 64 | # [6:0] Rx Strobe Delay DLL 2 (HS400 Mode), each 125ps, range: 0 - 39, total 2625ps. |
| 65 | register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x11515" |
| 66 | |
Leo Chou | e79d97b | 2024-04-03 15:06:30 +0800 | [diff] [blame] | 67 | # SOC Aux orientation override: |
| 68 | # This is a bitfield that corresponds to up to 4 TCSS ports. |
| 69 | # Bits (0,1) allocated for TCSS Port1 configuration and Bits (2,3)for TCSS Port2. |
| 70 | # TcssAuxOri = 0101b |
| 71 | # Bit0,Bit2 set to "1" indicates no retimer on USBC Ports |
| 72 | # Bit1,Bit3 set to "0" indicates Aux lines are not swapped on the |
| 73 | # motherboard to USBC connector |
| 74 | register "tcss_aux_ori" = "5" |
| 75 | |
| 76 | register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}" |
| 77 | register "typec_aux_bias_pads[1]" = "{.pad_auxp_dc = GPP_A21, .pad_auxn_dc = GPP_A22}" |
| 78 | |
| 79 | register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C0 |
| 80 | register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C1 |
| 81 | register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # WWAN |
| 82 | register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # WFC Camera |
| 83 | register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for PCIe WLAN |
| 84 | register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for CNVi WLAN |
| 85 | |
| 86 | register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3 port for WWAN |
| 87 | |
| 88 | # Configure external V1P05/Vnn/VnnSx Rails for Sundance |
| 89 | register "ext_fivr_settings" = "{ |
| 90 | .configure_ext_fivr = 1, |
| 91 | .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX & ~FIVR_ENABLE_S0, |
| 92 | .vnn_enable_bitmap = FIVR_ENABLE_ALL_SX, |
| 93 | .vnn_sx_enable_bitmap = FIVR_ENABLE_ALL_SX, |
| 94 | .v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL, |
| 95 | .vnn_supported_voltage_bitmap = FIVR_VOLTAGE_MIN_ACTIVE, |
| 96 | .v1p05_voltage_mv = 1050, |
| 97 | .vnn_voltage_mv = 780, |
| 98 | .vnn_sx_voltage_mv = 1050, |
| 99 | .v1p05_icc_max_ma = 500, |
| 100 | .vnn_icc_max_ma = 500, |
| 101 | }" |
| 102 | |
| 103 | # Intel Common SoC Config |
| 104 | #+-------------------+---------------------------+ |
| 105 | #| Field | Value | |
| 106 | #+-------------------+---------------------------+ |
| 107 | #| I2C0 | TPM. Early init is | |
| 108 | #| | required to set up a BAR | |
| 109 | #| | for TPM communication | |
| 110 | #| I2C1 | Touchscreen | |
| 111 | #| I2C3 | Audio | |
| 112 | #| I2C5 | Trackpad | |
| 113 | #+-------------------+---------------------------+ |
| 114 | register "common_soc_config" = "{ |
| 115 | .i2c[0] = { |
| 116 | .early_init = 1, |
| 117 | .speed = I2C_SPEED_FAST_PLUS, |
| 118 | .speed_config[0] = { |
| 119 | .speed = I2C_SPEED_FAST_PLUS, |
| 120 | .scl_lcnt = 55, |
| 121 | .scl_hcnt = 30, |
| 122 | .sda_hold = 7, |
| 123 | } |
| 124 | }, |
| 125 | .i2c[1] = { |
| 126 | .speed = I2C_SPEED_FAST, |
| 127 | .speed_config[0] = { |
| 128 | .speed = I2C_SPEED_FAST, |
| 129 | .scl_lcnt = 157, |
| 130 | .scl_hcnt = 79, |
| 131 | .sda_hold = 7, |
| 132 | } |
| 133 | }, |
| 134 | .i2c[3] = { |
| 135 | .speed = I2C_SPEED_FAST, |
| 136 | .speed_config[0] = { |
| 137 | .speed = I2C_SPEED_FAST, |
| 138 | .scl_lcnt = 158, |
| 139 | .scl_hcnt = 79, |
| 140 | .sda_hold = 7, |
| 141 | } |
| 142 | }, |
| 143 | .i2c[5] = { |
| 144 | .speed = I2C_SPEED_FAST, |
| 145 | .speed_config[0] = { |
| 146 | .speed = I2C_SPEED_FAST, |
| 147 | .scl_lcnt = 158, |
| 148 | .scl_hcnt = 79, |
| 149 | .sda_hold = 7, |
| 150 | } |
| 151 | }, |
| 152 | }" |
| 153 | |
| 154 | device domain 0 on |
Roger Wang | 1985cac | 2024-06-14 09:04:53 +0800 | [diff] [blame] | 155 | device ref dtt on |
| 156 | chip drivers/intel/dptf |
| 157 | ## sensor information |
| 158 | register "options.tsr[0].desc" = ""CPU"" |
| 159 | register "options.tsr[1].desc" = ""DDR"" |
| 160 | register "options.tsr[2].desc" = ""5VCharger"" |
| 161 | |
| 162 | |
| 163 | ## Passive Policy |
| 164 | register "policies.passive" = "{ |
| 165 | [0] = DPTF_PASSIVE(CPU, CPU, 90, 10000), |
| 166 | [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 60000), |
| 167 | [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 80, 60000), |
| 168 | [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 15000), |
| 169 | }" |
| 170 | |
| 171 | ## Critical Policy |
| 172 | register "policies.critical" = "{ |
| 173 | [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN), |
| 174 | [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 100, SHUTDOWN), |
| 175 | [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 100, SHUTDOWN), |
| 176 | [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 100, SHUTDOWN), |
| 177 | }" |
| 178 | |
| 179 | register "controls.power_limits" = "{ |
| 180 | .pl1 = { |
| 181 | .min_power = 3000, |
| 182 | .max_power = 6000, |
| 183 | .time_window_min = 1 * MSECS_PER_SEC, |
| 184 | .time_window_max = 1 * MSECS_PER_SEC, |
| 185 | .granularity = 200, |
| 186 | }, |
| 187 | .pl2 = { |
| 188 | .min_power = 25000, |
| 189 | .max_power = 25000, |
| 190 | .time_window_min = 1 * MSECS_PER_SEC, |
| 191 | .time_window_max = 1 * MSECS_PER_SEC, |
| 192 | .granularity = 1000, |
| 193 | } |
| 194 | }" |
| 195 | |
| 196 | ## Charger Performance Control (Control, mA) |
| 197 | register "controls.charger_perf" = "{ |
| 198 | [0] = { 255, 3000 }, |
| 199 | [1] = { 24, 2000 }, |
| 200 | [2] = { 16, 1500 }, |
| 201 | [3] = { 8, 1000 } |
| 202 | }" |
| 203 | device generic 0 on end |
| 204 | end |
| 205 | end |
Leo Chou | e79d97b | 2024-04-03 15:06:30 +0800 | [diff] [blame] | 206 | device ref i2c1 on |
| 207 | chip drivers/i2c/hid |
Leo Chou | e538926 | 2024-04-11 10:40:54 +0800 | [diff] [blame] | 208 | register "generic.hid" = ""GDIX0000"" |
| 209 | register "generic.desc" = ""Goodix Touchscreen"" |
Leo Chou | e79d97b | 2024-04-03 15:06:30 +0800 | [diff] [blame] | 210 | register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)" |
| 211 | register "generic.detect" = "1" |
Leo Chou | e79d97b | 2024-04-03 15:06:30 +0800 | [diff] [blame] | 212 | register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)" |
Leo Chou | e538926 | 2024-04-11 10:40:54 +0800 | [diff] [blame] | 213 | register "generic.enable_delay_ms" = "20" |
Leo Chou | e79d97b | 2024-04-03 15:06:30 +0800 | [diff] [blame] | 214 | register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)" |
Leo Chou | e538926 | 2024-04-11 10:40:54 +0800 | [diff] [blame] | 215 | register "generic.reset_delay_ms" = "180" |
| 216 | register "generic.reset_off_delay_ms" = "3" |
Leo Chou | e79d97b | 2024-04-03 15:06:30 +0800 | [diff] [blame] | 217 | register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)" |
Leo Chou | e538926 | 2024-04-11 10:40:54 +0800 | [diff] [blame] | 218 | register "generic.stop_off_delay_ms" = "1" |
Leo Chou | e79d97b | 2024-04-03 15:06:30 +0800 | [diff] [blame] | 219 | register "generic.has_power_resource" = "1" |
| 220 | register "hid_desc_reg_offset" = "0x01" |
Leo Chou | e538926 | 2024-04-11 10:40:54 +0800 | [diff] [blame] | 221 | device i2c 5d on end |
Leo Chou | e79d97b | 2024-04-03 15:06:30 +0800 | [diff] [blame] | 222 | end |
| 223 | end |
| 224 | device ref i2c3 on |
| 225 | chip drivers/i2c/generic |
| 226 | register "hid" = ""RTL5682"" |
| 227 | register "name" = ""RT58"" |
| 228 | register "desc" = ""Headset Codec"" |
| 229 | register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)" |
| 230 | # Set the jd_src to RT5668_JD1 for jack detection |
| 231 | register "property_count" = "1" |
| 232 | register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" |
| 233 | register "property_list[0].name" = ""realtek,jd-src"" |
| 234 | register "property_list[0].integer" = "1" |
| 235 | device i2c 1a on end |
| 236 | end |
| 237 | chip drivers/generic/alc1015 |
| 238 | register "hid" = ""RTL1019"" |
| 239 | register "sdb" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)" |
| 240 | device generic 0 on end |
| 241 | end |
| 242 | end |
| 243 | device ref i2c5 on |
| 244 | chip drivers/i2c/generic |
| 245 | register "hid" = ""ELAN0000"" |
| 246 | register "desc" = ""ELAN Touchpad"" |
| 247 | register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)" |
| 248 | register "wake" = "GPE0_DW2_14" |
| 249 | register "detect" = "1" |
| 250 | device i2c 15 on end |
| 251 | end |
| 252 | chip drivers/i2c/hid |
Leo Chou | e538926 | 2024-04-11 10:40:54 +0800 | [diff] [blame] | 253 | register "generic.hid" = ""FCAL0000"" |
Leo Chou | e79d97b | 2024-04-03 15:06:30 +0800 | [diff] [blame] | 254 | register "generic.cid" = ""ACPI0C50"" |
Leo Chou | e538926 | 2024-04-11 10:40:54 +0800 | [diff] [blame] | 255 | register "generic.desc" = ""Focal Touchpad"" |
Leo Chou | e79d97b | 2024-04-03 15:06:30 +0800 | [diff] [blame] | 256 | register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)" |
| 257 | register "generic.wake" = "GPE0_DW2_14" |
| 258 | register "generic.detect" = "1" |
Leo Chou | 94d50bb | 2024-05-10 14:15:42 +0800 | [diff] [blame] | 259 | register "hid_desc_reg_offset" = "0x01" |
Leo Chou | e538926 | 2024-04-11 10:40:54 +0800 | [diff] [blame] | 260 | device i2c 0x38 on end |
Leo Chou | e79d97b | 2024-04-03 15:06:30 +0800 | [diff] [blame] | 261 | end |
| 262 | end |
| 263 | device ref pcie_rp4 on |
| 264 | # PCIe 4 WLAN |
| 265 | register "pch_pcie_rp[PCH_RP(4)]" = "{ |
| 266 | .clk_src = 2, |
| 267 | .clk_req = 2, |
| 268 | .flags = PCIE_RP_LTR | PCIE_RP_AER, |
| 269 | }" |
| 270 | chip drivers/wifi/generic |
| 271 | register "wake" = "GPE0_DW1_03" |
| 272 | register "add_acpi_dma_property" = "true" |
| 273 | device pci 00.0 on end |
| 274 | end |
| 275 | end |
| 276 | device ref pch_espi on |
| 277 | chip ec/google/chromeec |
| 278 | use conn0 as mux_conn[0] |
| 279 | use conn1 as mux_conn[1] |
| 280 | device pnp 0c09.0 on end |
| 281 | end |
| 282 | end |
| 283 | device ref pmc hidden |
| 284 | chip drivers/intel/pmc_mux |
| 285 | device generic 0 on |
| 286 | chip drivers/intel/pmc_mux/conn |
| 287 | use usb2_port1 as usb2_port |
| 288 | use tcss_usb3_port1 as usb3_port |
| 289 | device generic 0 alias conn0 on end |
| 290 | end |
| 291 | chip drivers/intel/pmc_mux/conn |
| 292 | use usb2_port2 as usb2_port |
| 293 | use tcss_usb3_port2 as usb3_port |
| 294 | device generic 1 alias conn1 on end |
| 295 | end |
| 296 | end |
| 297 | end |
| 298 | end |
| 299 | device ref tcss_xhci on |
| 300 | chip drivers/usb/acpi |
| 301 | device ref tcss_root_hub on |
| 302 | chip drivers/usb/acpi |
| 303 | register "desc" = ""USB3 Type-C Port C0 (MLB)"" |
| 304 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 305 | register "use_custom_pld" = "true" |
| 306 | register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" |
| 307 | device ref tcss_usb3_port1 on end |
| 308 | end |
| 309 | chip drivers/usb/acpi |
| 310 | register "desc" = ""USB3 Type-C Port C1 (MLB)"" |
| 311 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 312 | register "use_custom_pld" = "true" |
| 313 | register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" |
| 314 | device ref tcss_usb3_port2 on end |
| 315 | end |
| 316 | end |
| 317 | end |
| 318 | end |
| 319 | device ref xhci on |
| 320 | chip drivers/usb/acpi |
| 321 | device ref xhci_root_hub on |
| 322 | chip drivers/usb/acpi |
| 323 | register "desc" = ""USB2 Type-C Port C0 (MLB)"" |
| 324 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 325 | register "use_custom_pld" = "true" |
| 326 | register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" |
| 327 | device ref usb2_port1 on end |
| 328 | end |
| 329 | chip drivers/usb/acpi |
| 330 | register "desc" = ""USB2 Type-C Port C1 (MLB)"" |
| 331 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 332 | register "use_custom_pld" = "true" |
| 333 | register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" |
| 334 | device ref usb2_port2 on end |
| 335 | end |
| 336 | chip drivers/usb/acpi |
| 337 | register "desc" = ""USB2 WWAN"" |
| 338 | register "type" = "UPC_TYPE_INTERNAL" |
Leo Chou | fdeebb7 | 2024-06-11 16:23:33 +0800 | [diff] [blame] | 339 | device ref usb2_port5 on |
| 340 | probe WWAN LTE_PRESENT |
| 341 | end |
Leo Chou | e79d97b | 2024-04-03 15:06:30 +0800 | [diff] [blame] | 342 | end |
| 343 | chip drivers/usb/acpi |
| 344 | register "desc" = ""USB2 UFC"" |
| 345 | register "type" = "UPC_TYPE_INTERNAL" |
| 346 | device ref usb2_port6 on end |
| 347 | end |
| 348 | chip drivers/usb/acpi |
| 349 | register "desc" = ""USB2 WFC"" |
| 350 | register "type" = "UPC_TYPE_INTERNAL" |
| 351 | device ref usb2_port7 on end |
| 352 | end |
| 353 | chip drivers/usb/acpi |
| 354 | register "desc" = ""USB2 Bluetooth"" |
| 355 | register "type" = "UPC_TYPE_INTERNAL" |
| 356 | register "reset_gpio" = |
| 357 | "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)" |
| 358 | device ref usb2_port8 on end |
| 359 | end |
| 360 | chip drivers/usb/acpi |
| 361 | register "desc" = ""CNVi Bluetooth"" |
| 362 | register "type" = "UPC_TYPE_INTERNAL" |
| 363 | register "reset_gpio" = |
| 364 | "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)" |
| 365 | device ref usb2_port10 on end |
| 366 | end |
| 367 | chip drivers/usb/acpi |
| 368 | register "desc" = ""USB3 WWAN"" |
| 369 | register "type" = "UPC_TYPE_INTERNAL" |
Leo Chou | fdeebb7 | 2024-06-11 16:23:33 +0800 | [diff] [blame] | 370 | device ref usb3_port3 on |
| 371 | probe WWAN LTE_PRESENT |
| 372 | end |
Leo Chou | e79d97b | 2024-04-03 15:06:30 +0800 | [diff] [blame] | 373 | end |
| 374 | end |
| 375 | end |
| 376 | end |
| 377 | end |
Leo Chou | f2492c3 | 2024-03-20 11:42:09 +0800 | [diff] [blame] | 378 | end |