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Stefan Reinauer00636b02012-04-04 00:08:51 +02001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2007-2009 coresystems GmbH
Patrick Rudolph0b643d22017-07-05 20:07:06 +02005 * Copyright (C) 2017-2018 Patrick Rudolph <siro@das-labor.org>
Stefan Reinauer00636b02012-04-04 00:08:51 +02006 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; version 2 of
10 * the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
Stefan Reinauer00636b02012-04-04 00:08:51 +020016 */
17
Duncan Laurie55864ef2012-07-16 12:27:42 -070018#include "hostbridge.asl"
Patrick Rudolph0b643d22017-07-05 20:07:06 +020019#include "peg.asl"
Stefan Reinauer00636b02012-04-04 00:08:51 +020020
21/* PCI Device Resource Consumption */
22Device (PDRC)
23{
24 Name (_HID, EISAID("PNP0C02"))
25 Name (_UID, 1)
26
27 Name (PDRS, ResourceTemplate() {
28 Memory32Fixed(ReadWrite, 0xfed1c000, 0x00004000) // RCBA
Patrick Rudolph2af2f2c2019-03-26 14:33:16 +010029 // Filled by _CRS
30 Memory32Fixed(ReadWrite, 0, 0x00008000, MCHB)
31 Memory32Fixed(ReadWrite, 0, 0x00001000, DMIB)
32 Memory32Fixed(ReadWrite, 0, 0x00001000, EGPB)
33 Memory32Fixed(ReadWrite, 0, 0x04000000, PCIX)
Stefan Reinauer00636b02012-04-04 00:08:51 +020034 Memory32Fixed(ReadWrite, 0xfed20000, 0x00020000) // Misc ICH
Patrick Rudolph2af2f2c2019-03-26 14:33:16 +010035 Memory32Fixed(ReadWrite, 0xfed40000, 0x00005000) // TPM TIS
Stefan Reinauer00636b02012-04-04 00:08:51 +020036 Memory32Fixed(ReadWrite, 0xfed45000, 0x0004b000) // Misc ICH
37
Julius Wernercd49cce2019-03-05 16:53:33 -080038#if CONFIG(CHROMEOS_RAMOOPS)
Stefan Reinauer00636b02012-04-04 00:08:51 +020039 Memory32Fixed(ReadWrite, CONFIG_CHROMEOS_RAMOOPS_RAM_START,
40 CONFIG_CHROMEOS_RAMOOPS_RAM_SIZE)
41#endif
42
43 /* Required for SandyBridge sighting 3715511 */
44 Memory32Fixed(ReadWrite, 0x20000000, 0x00200000)
45 Memory32Fixed(ReadWrite, 0x40000000, 0x00200000)
46 })
47
48 // Current Resource Settings
49 Method (_CRS, 0, Serialized)
50 {
Patrick Rudolph2af2f2c2019-03-26 14:33:16 +010051 CreateDwordField (PDRS, ^MCHB._BAS, MBR0)
52 MBR0 = \_SB.PCI0.MCHC.MHBR << 15
53
54 CreateDwordField (PDRS, ^DMIB._BAS, DBR0)
55 DBR0 = \_SB.PCI0.MCHC.DMBR << 12
56
57 CreateDwordField (PDRS, ^EGPB._BAS, EBR0)
58 EBR0 = \_SB.PCI0.MCHC.EPBR << 12
59
60 CreateDwordField (PDRS, ^PCIX._BAS, XBR0)
61 XBR0 = \_SB.PCI0.MCHC.PXBR << 26
62
63 CreateDwordField (PDRS, ^PCIX._LEN, XSZ0)
64 XSZ0 = 0x10000000 << \_SB.PCI0.MCHC.PXSZ
65
Stefan Reinauer00636b02012-04-04 00:08:51 +020066 Return(PDRS)
67 }
68}
69
70// Integrated graphics 0:2.0
Nico Huber62047d12015-08-27 15:07:03 +020071#include <drivers/intel/gma/acpi/pch.asl>