| Nicolas Reinecke | 29d358e | 2015-01-31 19:20:50 +0100 | [diff] [blame^] | 1 | ## |
| 2 | ## This file is part of the coreboot project. |
| 3 | ## |
| 4 | ## Copyright (C) 2007-2008 coresystems GmbH |
| 5 | ## Copyright (C) 2014 Vladimir Serbinenko |
| 6 | ## |
| 7 | ## This program is free software; you can redistribute it and/or modify |
| 8 | ## it under the terms of the GNU General Public License as published by |
| 9 | ## the Free Software Foundation; version 2 of the License. |
| 10 | ## |
| 11 | ## This program is distributed in the hope that it will be useful, |
| 12 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | ## GNU General Public License for more details. |
| 15 | ## |
| 16 | ## You should have received a copy of the GNU General Public License |
| 17 | ## along with this program; if not, write to the Free Software |
| 18 | ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 19 | ## |
| 20 | |
| 21 | # ----------------------------------------------------------------- |
| 22 | entries |
| 23 | |
| 24 | #start-bit length config config-ID name |
| 25 | #0 8 r 0 seconds |
| 26 | #8 8 r 0 alarm_seconds |
| 27 | #16 8 r 0 minutes |
| 28 | #24 8 r 0 alarm_minutes |
| 29 | #32 8 r 0 hours |
| 30 | #40 8 r 0 alarm_hours |
| 31 | #48 8 r 0 day_of_week |
| 32 | #56 8 r 0 day_of_month |
| 33 | #64 8 r 0 month |
| 34 | #72 8 r 0 year |
| 35 | # ----------------------------------------------------------------- |
| 36 | # Status Register A |
| 37 | #80 4 r 0 rate_select |
| 38 | #84 3 r 0 REF_Clock |
| 39 | #87 1 r 0 UIP |
| 40 | # ----------------------------------------------------------------- |
| 41 | # Status Register B |
| 42 | #88 1 r 0 auto_switch_DST |
| 43 | #89 1 r 0 24_hour_mode |
| 44 | #90 1 r 0 binary_values_enable |
| 45 | #91 1 r 0 square-wave_out_enable |
| 46 | #92 1 r 0 update_finished_enable |
| 47 | #93 1 r 0 alarm_interrupt_enable |
| 48 | #94 1 r 0 periodic_interrupt_enable |
| 49 | #95 1 r 0 disable_clock_updates |
| 50 | # ----------------------------------------------------------------- |
| 51 | # Status Register C |
| 52 | #96 4 r 0 status_c_rsvd |
| 53 | #100 1 r 0 uf_flag |
| 54 | #101 1 r 0 af_flag |
| 55 | #102 1 r 0 pf_flag |
| 56 | #103 1 r 0 irqf_flag |
| 57 | # ----------------------------------------------------------------- |
| 58 | # Status Register D |
| 59 | #104 7 r 0 status_d_rsvd |
| 60 | #111 1 r 0 valid_cmos_ram |
| 61 | # ----------------------------------------------------------------- |
| 62 | # Diagnostic Status Register |
| 63 | #112 8 r 0 diag_rsvd1 |
| 64 | |
| 65 | # ----------------------------------------------------------------- |
| 66 | 0 120 r 0 reserved_memory |
| 67 | #120 264 r 0 unused |
| 68 | |
| 69 | # ----------------------------------------------------------------- |
| 70 | # RTC_BOOT_BYTE (coreboot hardcoded) |
| 71 | 384 1 e 4 boot_option |
| 72 | 385 1 e 4 last_boot |
| 73 | 388 4 r 0 reboot_bits |
| 74 | #390 2 r 0 unused? |
| 75 | |
| 76 | # ----------------------------------------------------------------- |
| 77 | # coreboot config options: console |
| 78 | 392 3 e 5 baud_rate |
| 79 | 395 4 e 6 debug_level |
| 80 | #399 1 r 0 unused |
| 81 | |
| 82 | 400 8 h 0 volume |
| 83 | |
| 84 | # coreboot config options: southbridge |
| 85 | 408 1 e 1 nmi |
| 86 | 409 2 e 7 power_on_after_fail |
| 87 | |
| 88 | # coreboot config options: EC |
| 89 | 411 1 e 8 first_battery |
| 90 | 412 1 e 1 bluetooth |
| 91 | 413 1 e 1 wwan |
| 92 | 414 1 e 1 touchpad |
| 93 | 415 1 e 1 wlan |
| 94 | 416 1 e 1 trackpoint |
| 95 | 417 1 e 1 fn_ctrl_swap |
| 96 | 418 1 e 1 sticky_fn |
| 97 | #419 2 r 0 unused |
| 98 | 421 1 e 9 sata_mode |
| 99 | 422 2 e 10 backlight |
| 100 | |
| 101 | # coreboot config options: cpu |
| 102 | 424 1 e 2 hyper_threading |
| 103 | #425 7 r 0 unused |
| 104 | |
| 105 | # coreboot config options: northbridge |
| 106 | 432 3 e 11 gfx_uma_size |
| 107 | #435 549 r 0 unused |
| 108 | |
| 109 | # SandyBridge MRC Scrambler Seed values |
| 110 | 896 32 r 0 mrc_scrambler_seed |
| 111 | 928 32 r 0 mrc_scrambler_seed_s3 |
| 112 | 960 16 r 0 mrc_scrambler_seed_chk |
| 113 | |
| 114 | # coreboot config options: check sums |
| 115 | 984 16 h 0 check_sum |
| 116 | |
| 117 | # ----------------------------------------------------------------- |
| 118 | |
| 119 | enumerations |
| 120 | |
| 121 | #ID value text |
| 122 | 1 0 Disable |
| 123 | 1 1 Enable |
| 124 | 2 0 Enable |
| 125 | 2 1 Disable |
| 126 | 4 0 Fallback |
| 127 | 4 1 Normal |
| 128 | 5 0 115200 |
| 129 | 5 1 57600 |
| 130 | 5 2 38400 |
| 131 | 5 3 19200 |
| 132 | 5 4 9600 |
| 133 | 5 5 4800 |
| 134 | 5 6 2400 |
| 135 | 5 7 1200 |
| 136 | 6 1 Emergency |
| 137 | 6 2 Alert |
| 138 | 6 3 Critical |
| 139 | 6 4 Error |
| 140 | 6 5 Warning |
| 141 | 6 6 Notice |
| 142 | 6 7 Info |
| 143 | 6 8 Debug |
| 144 | 6 9 Spew |
| 145 | 7 0 Disable |
| 146 | 7 1 Enable |
| 147 | 7 2 Keep |
| 148 | 8 0 Secondary |
| 149 | 8 1 Primary |
| 150 | 9 0 AHCI |
| 151 | 9 1 Compatible |
| 152 | 10 0 Both |
| 153 | 10 1 Keyboard only |
| 154 | 10 2 Thinklight only |
| 155 | 10 3 None |
| 156 | 11 0 32M |
| 157 | 11 1 64M |
| 158 | 11 2 96M |
| 159 | 11 3 128M |
| 160 | 11 4 160M |
| 161 | 11 5 192M |
| 162 | 11 6 224M |
| 163 | |
| 164 | # ----------------------------------------------------------------- |
| 165 | checksums |
| 166 | |
| 167 | checksum 392 415 984 |