Furquan Shaikh | 8888072 | 2017-05-01 14:23:37 -0700 | [diff] [blame] | 1 | chip soc/intel/skylake |
| 2 | |
| 3 | # Deep Sx states |
| 4 | register "deep_s3_enable_ac" = "0" |
| 5 | register "deep_s3_enable_dc" = "1" |
| 6 | register "deep_s5_enable_ac" = "1" |
| 7 | register "deep_s5_enable_dc" = "1" |
| 8 | register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN" |
| 9 | |
| 10 | # GPE configuration |
| 11 | # Note that GPE events called out in ASL code rely on this |
| 12 | # route. i.e. If this route changes then the affected GPE |
| 13 | # offset bits also need to be changed. |
| 14 | register "gpe0_dw0" = "GPP_B" |
| 15 | register "gpe0_dw1" = "GPP_D" |
| 16 | register "gpe0_dw2" = "GPP_E" |
| 17 | |
| 18 | # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f |
| 19 | register "gen1_dec" = "0x00fc0801" |
| 20 | register "gen2_dec" = "0x000c0201" |
| 21 | # EC memory map range is 0x900-0x9ff |
| 22 | register "gen3_dec" = "0x00fc0901" |
| 23 | |
| 24 | # Enable DPTF |
| 25 | register "dptf_enable" = "1" |
| 26 | |
| 27 | # FSP Configuration |
| 28 | register "ProbelessTrace" = "0" |
| 29 | register "EnableLan" = "0" |
| 30 | register "EnableSata" = "0" |
| 31 | register "SataSalpSupport" = "0" |
| 32 | register "SataMode" = "0" |
| 33 | register "SataPortsEnable[0]" = "0" |
| 34 | register "EnableAzalia" = "1" |
| 35 | register "DspEnable" = "1" |
| 36 | register "IoBufferOwnership" = "3" |
| 37 | register "EnableTraceHub" = "0" |
| 38 | register "XdciEnable" = "0" |
| 39 | register "SsicPortEnable" = "0" |
| 40 | register "SmbusEnable" = "1" |
| 41 | register "Cio2Enable" = "1" |
| 42 | register "SaImguEnable" = "1" |
| 43 | register "ScsEmmcEnabled" = "1" |
| 44 | register "ScsEmmcHs400Enabled" = "1" |
| 45 | register "ScsSdCardEnabled" = "2" |
| 46 | register "IshEnable" = "0" |
| 47 | register "PttSwitch" = "0" |
| 48 | register "InternalGfx" = "1" |
| 49 | register "SkipExtGfxScan" = "1" |
| 50 | register "Device4Enable" = "1" |
| 51 | register "HeciEnabled" = "0" |
| 52 | register "FspSkipMpInit" = "1" |
| 53 | register "SaGv" = "3" |
| 54 | register "SerialIrqConfigSirqEnable" = "1" |
| 55 | register "PmConfigSlpS3MinAssert" = "2" # 50ms |
| 56 | register "PmConfigSlpS4MinAssert" = "1" # 1s |
| 57 | register "PmConfigSlpSusMinAssert" = "1" # 500ms |
| 58 | register "PmConfigSlpAMinAssert" = "3" # 2s |
| 59 | register "PmTimerDisabled" = "1" |
| 60 | register "SendVrMbxCmd" = "1" # IMVP8 workaround |
| 61 | |
| 62 | register "pirqa_routing" = "PCH_IRQ11" |
| 63 | register "pirqb_routing" = "PCH_IRQ10" |
| 64 | register "pirqc_routing" = "PCH_IRQ11" |
| 65 | register "pirqd_routing" = "PCH_IRQ11" |
| 66 | register "pirqe_routing" = "PCH_IRQ11" |
| 67 | register "pirqf_routing" = "PCH_IRQ11" |
| 68 | register "pirqg_routing" = "PCH_IRQ11" |
| 69 | register "pirqh_routing" = "PCH_IRQ11" |
| 70 | |
| 71 | # VR Settings Configuration for 4 Domains |
| 72 | #+----------------+-------+-------+-------+-------+ |
| 73 | #| Domain/Setting | SA | IA | GTUS | GTS | |
| 74 | #+----------------+-------+-------+-------+-------+ |
| 75 | #| Psi1Threshold | 20A | 20A | 20A | 20A | |
| 76 | #| Psi2Threshold | 4A | 5A | 5A | 5A | |
| 77 | #| Psi3Threshold | 1A | 1A | 1A | 1A | |
| 78 | #| Psi3Enable | 1 | 1 | 1 | 1 | |
| 79 | #| Psi4Enable | 1 | 1 | 1 | 1 | |
| 80 | #| ImonSlope | 0 | 0 | 0 | 0 | |
| 81 | #| ImonOffset | 0 | 0 | 0 | 0 | |
| 82 | #| IccMax | 7A | 34A | 35A | 35A | |
| 83 | #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V | |
| 84 | #+----------------+-------+-------+-------+-------+ |
| 85 | register "domain_vr_config[VR_SYSTEM_AGENT]" = "{ |
| 86 | .vr_config_enable = 1, |
| 87 | .psi1threshold = VR_CFG_AMP(20), |
| 88 | .psi2threshold = VR_CFG_AMP(4), |
| 89 | .psi3threshold = VR_CFG_AMP(1), |
| 90 | .psi3enable = 1, |
| 91 | .psi4enable = 1, |
| 92 | .imon_slope = 0x0, |
| 93 | .imon_offset = 0x0, |
| 94 | .icc_max = VR_CFG_AMP(7), |
| 95 | .voltage_limit = 1520, |
| 96 | }" |
| 97 | |
| 98 | register "domain_vr_config[VR_IA_CORE]" = "{ |
| 99 | .vr_config_enable = 1, |
| 100 | .psi1threshold = VR_CFG_AMP(20), |
| 101 | .psi2threshold = VR_CFG_AMP(5), |
| 102 | .psi3threshold = VR_CFG_AMP(1), |
| 103 | .psi3enable = 1, |
| 104 | .psi4enable = 1, |
| 105 | .imon_slope = 0x0, |
| 106 | .imon_offset = 0x0, |
| 107 | .icc_max = VR_CFG_AMP(34), |
| 108 | .voltage_limit = 1520, |
| 109 | }" |
| 110 | |
| 111 | register "domain_vr_config[VR_GT_UNSLICED]" = "{ |
| 112 | .vr_config_enable = 1, |
| 113 | .psi1threshold = VR_CFG_AMP(20), |
| 114 | .psi2threshold = VR_CFG_AMP(5), |
| 115 | .psi3threshold = VR_CFG_AMP(1), |
| 116 | .psi3enable = 1, |
| 117 | .psi4enable = 1, |
| 118 | .imon_slope = 0x0, |
| 119 | .imon_offset = 0x0, |
| 120 | .icc_max = VR_CFG_AMP(35), |
| 121 | .voltage_limit = 1520, |
| 122 | }" |
| 123 | |
| 124 | register "domain_vr_config[VR_GT_SLICED]" = "{ |
| 125 | .vr_config_enable = 1, |
| 126 | .psi1threshold = VR_CFG_AMP(20), |
| 127 | .psi2threshold = VR_CFG_AMP(5), |
| 128 | .psi3threshold = VR_CFG_AMP(1), |
| 129 | .psi3enable = 1, |
| 130 | .psi4enable = 1, |
| 131 | .imon_slope = 0x0, |
| 132 | .imon_offset = 0x0, |
| 133 | .icc_max = VR_CFG_AMP(35), |
| 134 | .voltage_limit = 1520, |
| 135 | }" |
| 136 | |
| 137 | # Enable Root port 1. |
| 138 | register "PcieRpEnable[0]" = "1" |
| 139 | # Enable CLKREQ# |
| 140 | register "PcieRpClkReqSupport[0]" = "1" |
| 141 | # RP 1 uses SRCCLKREQ1# |
| 142 | register "PcieRpClkReqNumber[0]" = "1" |
| 143 | |
| 144 | register "usb2_ports[0]" = "USB2_PORT_LONG(OC0)" # Type-C Port 1 |
| 145 | register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port |
| 146 | register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth |
| 147 | register "usb2_ports[4]" = "USB2_PORT_LONG(OC1)" # Type-C Port 2 |
| 148 | register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port |
| 149 | register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port |
| 150 | |
| 151 | register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # Type-C Port 1 |
| 152 | register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC1)" # Type-C Port 2 |
| 153 | register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Port |
| 154 | register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Empty |
| 155 | |
| 156 | register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3" # Touchscreen |
| 157 | register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3" # H1 |
| 158 | register "i2c_voltage[2]" = "I2C_VOLTAGE_1V8" # Camera |
| 159 | register "i2c_voltage[3]" = "I2C_VOLTAGE_1V8" # Pen |
| 160 | register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # Camera |
| 161 | register "i2c_voltage[5]" = "I2C_VOLTAGE_1V8" # Audio |
| 162 | |
| 163 | # Use GSPI0 for cr50 TPM. Early init is required to set up a BAR for TPM |
| 164 | # communication before memory is up. |
| 165 | register "gspi[0]" = "{ |
| 166 | .speed_mhz = 1, |
| 167 | .early_init = 1, |
| 168 | }" |
| 169 | |
| 170 | # Configure I2C1 for cr50 TPM. Early init is required to set up a BAR |
| 171 | # for TPM communication before memory is up. |
| 172 | register "i2c[1]" = "{ |
| 173 | .early_init = 1, |
| 174 | }" |
| 175 | |
| 176 | # Must leave UART0 enabled or SD/eMMC will not work as PCI |
| 177 | register "SerialIoDevMode" = "{ |
| 178 | [PchSerialIoIndexI2C0] = PchSerialIoPci, |
| 179 | [PchSerialIoIndexI2C1] = PchSerialIoPci, |
| 180 | [PchSerialIoIndexI2C2] = PchSerialIoPci, |
| 181 | [PchSerialIoIndexI2C3] = PchSerialIoPci, |
| 182 | [PchSerialIoIndexI2C4] = PchSerialIoPci, |
| 183 | [PchSerialIoIndexI2C5] = PchSerialIoPci, |
| 184 | [PchSerialIoIndexSpi0] = PchSerialIoPci, |
Furquan Shaikh | 296c79c | 2017-06-09 18:41:39 -0700 | [diff] [blame^] | 185 | [PchSerialIoIndexSpi1] = PchSerialIoDisabled, |
Furquan Shaikh | 8888072 | 2017-05-01 14:23:37 -0700 | [diff] [blame] | 186 | [PchSerialIoIndexUart0] = PchSerialIoPci, |
| 187 | [PchSerialIoIndexUart1] = PchSerialIoDisabled, |
| 188 | [PchSerialIoIndexUart2] = PchSerialIoSkipInit, |
| 189 | }" |
| 190 | |
| 191 | register "speed_shift_enable" = "1" |
| 192 | register "tdp_pl2_override" = "7" |
| 193 | register "tcc_offset" = "10" # TCC of 90C |
| 194 | |
| 195 | # Use default SD card detect GPIO configuration |
| 196 | register "sdcard_cd_gpio_default" = "GPP_E15" |
| 197 | |
| 198 | device cpu_cluster 0 on |
| 199 | device lapic 0 on end |
| 200 | end |
| 201 | device domain 0 on |
| 202 | device pci 00.0 on end # Host Bridge |
| 203 | device pci 02.0 on end # Integrated Graphics Device |
| 204 | device pci 14.0 on end # USB xHCI |
| 205 | device pci 14.1 off end # USB xDCI (OTG) |
| 206 | device pci 14.2 on end # Thermal Subsystem |
| 207 | device pci 15.0 on |
| 208 | chip drivers/i2c/generic |
| 209 | register "hid" = ""ATML0001"" |
| 210 | register "desc" = ""Atmel Touchscreen"" |
| 211 | register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E7_IRQ)" |
| 212 | register "probed" = "1" |
Furquan Shaikh | 73108de | 2017-05-23 11:56:09 -0700 | [diff] [blame] | 213 | register "has_power_resource" = "1" |
| 214 | register "disable_gpio_export_in_crs" = "1" |
| 215 | register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C22)" |
| 216 | register "enable_delay_ms" = "250" |
Furquan Shaikh | 8888072 | 2017-05-01 14:23:37 -0700 | [diff] [blame] | 217 | device i2c 4b on end |
| 218 | end |
| 219 | end # I2C #0 |
| 220 | device pci 15.1 on |
| 221 | chip drivers/i2c/tpm |
| 222 | register "hid" = ""GOOG0005"" |
| 223 | register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E0_IRQ)" |
| 224 | device i2c 50 on end |
| 225 | end |
| 226 | end # I2C #1 |
| 227 | device pci 15.2 on |
| 228 | chip drivers/intel/mipi_camera |
| 229 | register "acpi_hid" = ""INT3472"" |
| 230 | register "acpi_name" = ""PMIC"" |
| 231 | register "chip_name" = ""TPS68470 PMIC"" |
| 232 | register "device_type" = "INTEL_ACPI_CAMERA_PMIC" |
| 233 | device i2c 4d on end |
| 234 | end |
| 235 | chip drivers/intel/mipi_camera |
Naresh G Solanki | b25b232 | 2017-05-09 20:36:13 +0530 | [diff] [blame] | 236 | register "acpi_hid" = ""OVTID858"" |
Furquan Shaikh | 8888072 | 2017-05-01 14:23:37 -0700 | [diff] [blame] | 237 | register "acpi_name" = ""CAM0"" |
Naresh G Solanki | b25b232 | 2017-05-09 20:36:13 +0530 | [diff] [blame] | 238 | register "chip_name" = ""OV 13858 Camera"" |
Furquan Shaikh | 8888072 | 2017-05-01 14:23:37 -0700 | [diff] [blame] | 239 | register "device_type" = "INTEL_ACPI_CAMERA_SENSOR" |
| 240 | |
| 241 | # Camera SSDB buffer |
| 242 | register "ssdb.sensor_card_sku" = "0x50" |
| 243 | register "ssdb.link_used" = "0x00" |
| 244 | register "ssdb.lanes_used" = "0x04" |
| 245 | register "ssdb.rom_type" = "0x08" |
| 246 | register "ssdb.vcm_type" = "0x03" |
| 247 | register "ssdb.platform" = "0x09" |
| 248 | register "ssdb.flash_support" = "0x02" |
| 249 | register "ssdb.privacy_led" = "0x01" |
| 250 | register "ssdb.degree" = "0x00" |
| 251 | register "ssdb.mipi_define" = "0x01" |
| 252 | register "ssdb.mclk" = "0x016E3600" |
| 253 | |
| 254 | # Sensor PWDB entries |
| 255 | register "num_pwdb_entries" = "5" |
| 256 | |
| 257 | register "pwdb[0].name" = ""VSIO"" |
| 258 | register "pwdb[0].value" = "1800600" |
| 259 | register "pwdb[0].entry_type" = "INTEL_ACPI_CAMERA_REGULATOR" |
| 260 | register "pwdb[0].delay_usec" = "0" |
| 261 | |
| 262 | register "pwdb[1].name" = ""tps68470-a"" |
| 263 | register "pwdb[1].value" = "19200000" |
| 264 | register "pwdb[1].entry_type" = "INTEL_ACPI_CAMERA_CLK" |
| 265 | register "pwdb[1].delay_usec" = "0" |
| 266 | |
| 267 | register "pwdb[2].name" = ""ANA"" |
| 268 | register "pwdb[2].value" = "2815200" |
| 269 | register "pwdb[2].entry_type" = "INTEL_ACPI_CAMERA_REGULATOR" |
| 270 | register "pwdb[2].delay_usec" = "3000" |
| 271 | |
| 272 | register "pwdb[3].name" = ""s_resetn"" |
| 273 | register "pwdb[3].value" = "1" |
| 274 | register "pwdb[3].entry_type" = "INTEL_ACPI_CAMERA_GPIO" |
| 275 | register "pwdb[3].delay_usec" = "0" |
| 276 | |
| 277 | register "pwdb[4].name" = ""CORE"" |
| 278 | register "pwdb[4].value" = "1200000" |
| 279 | register "pwdb[4].entry_type" = "INTEL_ACPI_CAMERA_REGULATOR" |
| 280 | register "pwdb[4].delay_usec" = "3000" |
| 281 | |
| 282 | device i2c 10 on end |
| 283 | end |
| 284 | chip drivers/intel/mipi_camera |
| 285 | register "acpi_hid" = ""DW9714"" |
| 286 | register "acpi_name" = ""VCM0"" |
| 287 | register "chip_name" = ""Dongwoon AF DAC"" |
| 288 | register "device_type" = "INTEL_ACPI_CAMERA_VCM" |
| 289 | |
| 290 | # VCM PWDB entries |
| 291 | register "num_pwdb_entries" = "2" |
| 292 | register "pwdb[0].name" = ""VSIO"" |
| 293 | register "pwdb[0].value" = "1800600" |
| 294 | register "pwdb[0].entry_type" = "INTEL_ACPI_CAMERA_REGULATOR" |
| 295 | register "pwdb[0].delay_usec" = "0" |
| 296 | |
| 297 | register "pwdb[1].name" = ""VCM"" |
| 298 | register "pwdb[1].value" = "2815200" |
| 299 | register "pwdb[1].entry_type" = "INTEL_ACPI_CAMERA_REGULATOR" |
| 300 | register "pwdb[1].delay_usec" = "3000" |
| 301 | |
| 302 | device i2c 0xc on end |
| 303 | end |
| 304 | end # I2C #2 |
| 305 | device pci 15.3 on |
| 306 | chip drivers/i2c/hid |
| 307 | register "generic.hid" = ""WCOM50C1"" |
| 308 | register "generic.desc" = ""WCOM Digitizer"" |
| 309 | register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D1_IRQ)" |
| 310 | register "hid_desc_reg_offset" = "0x1" |
| 311 | device i2c 0x9 on end |
| 312 | end |
| 313 | end # I2C #3 |
| 314 | device pci 16.0 on end # Management Engine Interface 1 |
| 315 | device pci 16.1 off end # Management Engine Interface 2 |
| 316 | device pci 16.2 off end # Management Engine IDE-R |
| 317 | device pci 16.3 off end # Management Engine KT Redirection |
| 318 | device pci 16.4 off end # Management Engine Interface 3 |
| 319 | device pci 17.0 off end # SATA |
| 320 | device pci 19.0 on end # UART #2 |
| 321 | device pci 19.1 on |
| 322 | chip drivers/i2c/max98927 |
| 323 | register "interleave_mode" = "1" |
| 324 | register "uid" = "0" |
| 325 | register "desc" = ""SSM4567 Right Speaker Amp"" |
| 326 | register "name" = ""MAXR"" |
| 327 | device i2c 39 on end |
| 328 | end |
| 329 | chip drivers/i2c/max98927 |
| 330 | register "interleave_mode" = "1" |
| 331 | register "uid" = "1" |
| 332 | register "desc" = ""SSM4567 Left Speaker Amp"" |
| 333 | register "name" = ""MAXL"" |
| 334 | device i2c 3A on end |
| 335 | end |
| 336 | chip drivers/i2c/generic |
| 337 | register "hid" = ""10EC5663"" |
| 338 | register "name" = ""RT53"" |
| 339 | register "desc" = ""Realtek RT5663"" |
| 340 | register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_D9)" |
| 341 | register "probed" = "1" |
| 342 | device i2c 13 on end |
| 343 | end |
| 344 | end # I2C #5 |
| 345 | device pci 19.2 on |
| 346 | chip drivers/intel/mipi_camera |
| 347 | register "acpi_hid" = ""INT3479"" |
| 348 | register "acpi_name" = ""CAM1"" |
| 349 | register "chip_name" = ""OV 5670 Camera"" |
| 350 | register "device_type" = "INTEL_ACPI_CAMERA_SENSOR" |
| 351 | |
| 352 | # Camera SSDB buffer |
| 353 | register "ssdb.sensor_card_sku" = "0x50" |
| 354 | register "ssdb.link_used" = "0x01" |
| 355 | register "ssdb.lanes_used" = "0x02" |
| 356 | register "ssdb.rom_type" = "0x08" |
| 357 | register "ssdb.vcm_type" = "0x03" |
| 358 | register "ssdb.platform" = "0x09" |
| 359 | register "ssdb.flash_support" = "0x02" |
| 360 | register "ssdb.privacy_led" = "0x01" |
| 361 | register "ssdb.mipi_define" = "0x01" |
| 362 | register "ssdb.mclk" = "0x016E3600" |
| 363 | |
| 364 | # Sensor PWDB entries |
| 365 | register "num_pwdb_entries" = "6" |
| 366 | |
| 367 | register "pwdb[0].name" = ""VSIO"" |
| 368 | register "pwdb[0].value" = "1800600" |
| 369 | register "pwdb[0].entry_type" = "INTEL_ACPI_CAMERA_REGULATOR" |
| 370 | register "pwdb[0].delay_usec" = "0" |
| 371 | |
| 372 | register "pwdb[1].name" = ""AUX2"" |
| 373 | register "pwdb[1].value" = "1800600" |
| 374 | register "pwdb[1].entry_type" = "INTEL_ACPI_CAMERA_REGULATOR" |
| 375 | register "pwdb[1].delay_usec" = "0" |
| 376 | |
| 377 | register "pwdb[2].name" = ""tps68470-b"" |
| 378 | register "pwdb[2].value" = "19200000" |
| 379 | register "pwdb[2].entry_type" = "INTEL_ACPI_CAMERA_CLK" |
| 380 | register "pwdb[2].delay_usec" = "0" |
| 381 | |
| 382 | register "pwdb[3].name" = ""gpio.4"" |
| 383 | register "pwdb[3].value" = "1" |
| 384 | register "pwdb[3].entry_type" = "INTEL_ACPI_CAMERA_GPIO" |
| 385 | register "pwdb[3].delay_usec" = "3000" |
| 386 | |
| 387 | register "pwdb[4].name" = ""gpio.5"" |
| 388 | register "pwdb[4].value" = "1" |
| 389 | register "pwdb[4].entry_type" = "INTEL_ACPI_CAMERA_GPIO" |
| 390 | register "pwdb[4].delay_usec" = "0" |
| 391 | |
| 392 | register "pwdb[5].name" = ""AUX1"" |
| 393 | register "pwdb[5].value" = "1213200" |
| 394 | register "pwdb[5].entry_type" = "INTEL_ACPI_CAMERA_REGULATOR" |
| 395 | register "pwdb[5].delay_usec" = "3000" |
| 396 | |
Naresh G Solanki | 5e10422 | 2017-06-04 01:22:44 +0530 | [diff] [blame] | 397 | device i2c 36 on end |
Furquan Shaikh | 8888072 | 2017-05-01 14:23:37 -0700 | [diff] [blame] | 398 | end |
| 399 | end # I2C #4 |
| 400 | device pci 1c.0 on |
| 401 | chip drivers/intel/wifi |
| 402 | register "wake" = "GPE0_PCI_EXP" |
| 403 | device pci 00.0 on end |
| 404 | end |
| 405 | end # PCI Express Port 1 |
| 406 | device pci 1c.1 off end # PCI Express Port 2 |
| 407 | device pci 1c.2 off end # PCI Express Port 3 |
| 408 | device pci 1c.3 off end # PCI Express Port 4 |
| 409 | device pci 1c.4 off end # PCI Express Port 5 |
| 410 | device pci 1c.5 off end # PCI Express Port 6 |
| 411 | device pci 1c.6 off end # PCI Express Port 7 |
| 412 | device pci 1c.7 off end # PCI Express Port 8 |
| 413 | device pci 1d.0 off end # PCI Express Port 9 |
| 414 | device pci 1d.1 off end # PCI Express Port 10 |
| 415 | device pci 1d.2 off end # PCI Express Port 11 |
| 416 | device pci 1d.3 off end # PCI Express Port 12 |
| 417 | device pci 1e.0 on end # UART #0 |
| 418 | device pci 1e.1 off end # UART #1 |
Furquan Shaikh | dec6d4e | 2017-06-09 17:59:07 -0700 | [diff] [blame] | 419 | device pci 1e.2 on |
| 420 | chip drivers/spi/acpi |
| 421 | register "hid" = "ACPI_DT_NAMESPACE_HID" |
| 422 | register "compat_string" = ""google,cr50"" |
| 423 | register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E0_IRQ)" |
| 424 | device spi 0 on end |
| 425 | end |
| 426 | end # GSPI #0 |
Furquan Shaikh | 296c79c | 2017-06-09 18:41:39 -0700 | [diff] [blame^] | 427 | device pci 1e.3 off end # GSPI #1 |
Furquan Shaikh | 8888072 | 2017-05-01 14:23:37 -0700 | [diff] [blame] | 428 | device pci 1e.4 on end # eMMC |
| 429 | device pci 1e.5 off end # SDIO |
| 430 | device pci 1e.6 on end # SDCard |
| 431 | device pci 1f.0 on |
| 432 | chip ec/google/chromeec |
| 433 | device pnp 0c09.0 on end |
| 434 | end |
| 435 | end # LPC Interface |
| 436 | device pci 1f.1 on end # P2SB |
| 437 | device pci 1f.2 on end # Power Management Controller |
| 438 | device pci 1f.3 on end # Intel HDA |
| 439 | device pci 1f.4 on end # SMBus |
| 440 | device pci 1f.5 on end # PCH SPI |
| 441 | device pci 1f.6 off end # GbE |
| 442 | end |
| 443 | end |