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review.coreboot.org / coreboot / 29647d97c5e66484ab5c8b56ede57329ab5410c4 / . / src / mainboard / tyan / s2882 / Kconfig
blob: 2af58fe44386d1d22c150c7d0f898191a9ac0d5d [file] [log] [blame]
Patrick Georgi5726f922009-10-08 07:43:09 +0000[diff] [blame]1config BOARD_TYAN_S2882
Uwe Hermann4e015eb2009-10-20 13:55:35 +0000[diff] [blame]2 bool "S2882 (Thunder K8SR)"
Patrick Georgi5726f922009-10-08 07:43:09 +0000[diff] [blame]3 select ARCH_X86
Patrick Georgi5726f922009-10-08 07:43:09 +0000[diff] [blame]4 select CPU_AMD_SOCKET_940
5 select NORTHBRIDGE_AMD_AMDK8
6 select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
7 select SOUTHBRIDGE_AMD_AMD8131
8 select SOUTHBRIDGE_AMD_AMD8111
9 select SUPERIO_WINBOND_W83627HF
Myles Watsonb8e20272009-10-15 13:35:47 +0000[diff] [blame]10 select HAVE_PIRQ_TABLE
11 select HAVE_MP_TABLE
Uwe Hermannd65509d2009-10-16 17:37:20 +0000[diff] [blame]12 select BOARD_ROMSIZE_KB_512
Patrick Georgi29647d92010-01-25 07:56:01 +0000[diff] [blame^]13 select SB_HT_CHAIN_UNITID_OFFSET_ONLY
Patrick Georgi5726f922009-10-08 07:43:09 +0000[diff] [blame]14
15config MAINBOARD_DIR
16 string
17 default tyan/s2882
18 depends on BOARD_TYAN_S2882
19
20config APIC_ID_OFFSET
21 hex
22 default 0x10
23 depends on BOARD_TYAN_S2882
24
25config SB_HT_CHAIN_ON_BUS0
26 int
Patrick Georgi29647d92010-01-25 07:56:01 +0000[diff] [blame^]27 default 0
Patrick Georgi5726f922009-10-08 07:43:09 +0000[diff] [blame]28 depends on BOARD_TYAN_S2882
29
30config LB_CKS_RANGE_END
31 int
32 default 122
33 depends on BOARD_TYAN_S2882
34
35config LB_CKS_LOC
36 int
37 default 123
38 depends on BOARD_TYAN_S2882
39
40config MAINBOARD_PART_NUMBER
41 string
Uwe Hermann4e015eb2009-10-20 13:55:35 +0000[diff] [blame]42 default "S2882"
Patrick Georgi5726f922009-10-08 07:43:09 +0000[diff] [blame]43 depends on BOARD_TYAN_S2882
44
45config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
46 hex
47 default 0x2882
48 depends on BOARD_TYAN_S2882
49
50config HW_MEM_HOLE_SIZEK
51 hex
52 default 0x100000
53 depends on BOARD_TYAN_S2882
54
Patrick Georgi5726f922009-10-08 07:43:09 +0000[diff] [blame]55config MAX_CPUS
56 int
57 default 4
58 depends on BOARD_TYAN_S2882
59
60config MAX_PHYSICAL_CPUS
61 int
62 default 2
63 depends on BOARD_TYAN_S2882
64
Patrick Georgi5726f922009-10-08 07:43:09 +0000[diff] [blame]65config HW_MEM_HOLE_SIZE_AUTO_INC
66 bool
67 default n
68 depends on BOARD_TYAN_S2882
69
70config HT_CHAIN_UNITID_BASE
71 hex
Patrick Georgi29647d92010-01-25 07:56:01 +0000[diff] [blame^]72 default 0x1
Patrick Georgi5726f922009-10-08 07:43:09 +0000[diff] [blame]73 depends on BOARD_TYAN_S2882
74
75config HT_CHAIN_END_UNITID_BASE
76 hex
Patrick Georgi29647d92010-01-25 07:56:01 +0000[diff] [blame^]77 default 0x20
Patrick Georgi5726f922009-10-08 07:43:09 +0000[diff] [blame]78 depends on BOARD_TYAN_S2882
79
80config USE_INIT
81 bool
82 default n
83 depends on BOARD_TYAN_S2882
84
85config WAIT_BEFORE_CPUS_INIT
86 bool
87 default n
88 depends on BOARD_TYAN_S2882
89
Patrick Georgi5726f922009-10-08 07:43:09 +0000[diff] [blame]90config IRQ_SLOT_COUNT
91 int
92 default 9
93 depends on BOARD_TYAN_S2882