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review.coreboot.org / coreboot / 29647d97c5e66484ab5c8b56ede57329ab5410c4 / . / src / mainboard / iwill / dk8x / Kconfig
blob: 2fef70be3496517e803541a82dc185932b5d8ed6 [file] [log] [blame]
Patrick Georgi91ff0df2009-10-09 12:32:52 +0000[diff] [blame]1config BOARD_IWILL_DK8X
2 bool "DK8X"
3 select ARCH_X86
Patrick Georgi91ff0df2009-10-09 12:32:52 +0000[diff] [blame]4 select CPU_AMD_SOCKET_940
5 select NORTHBRIDGE_AMD_AMDK8
6 select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
7 select SOUTHBRIDGE_AMD_AMD8111
8 select SOUTHBRIDGE_AMD_AMD8131
9 select SUPERIO_WINBOND_W83627THF
10 select HAVE_PIRQ_TABLE
Myles Watsonb8e20272009-10-15 13:35:47 +0000[diff] [blame]11 select HAVE_MP_TABLE
Patrick Georgi91ff0df2009-10-09 12:32:52 +0000[diff] [blame]12 select USE_PRINTK_IN_CAR
13 select USE_DCACHE_RAM
14 select HAVE_HARD_RESET
Patrick Georgi91ff0df2009-10-09 12:32:52 +0000[diff] [blame]15 select SB_HT_CHAIN_UNITID_OFFSET_ONLY
16 select WAIT_BEFORE_CPUS_INIT
Uwe Hermannd65509d2009-10-16 17:37:20 +0000[diff] [blame]17 select BOARD_ROMSIZE_KB_512
Patrick Georgi91ff0df2009-10-09 12:32:52 +0000[diff] [blame]18
19config MAINBOARD_DIR
20 string
21 default iwill/dk8x
22 depends on BOARD_IWILL_DK8X
23
24config DCACHE_RAM_BASE
25 hex
26 default 0xc8000
27 depends on BOARD_IWILL_DK8X
28
29config DCACHE_RAM_SIZE
30 hex
31 default 0x08000
32 depends on BOARD_IWILL_DK8X
33
34config DCACHE_RAM_GLOBAL_VAR_SIZE
35 hex
36 default 0x01000
37 depends on BOARD_IWILL_DK8X
38
39config APIC_ID_OFFSET
40 hex
41 default 0x8
42 depends on BOARD_IWILL_DK8X
43
44config LB_CKS_RANGE_END
45 int
46 default 122
47 depends on BOARD_IWILL_DK8X
48
49config LB_CKS_LOC
50 int
51 default 123
52 depends on BOARD_IWILL_DK8X
53
54config MAINBOARD_PART_NUMBER
55 string
56 default "DK8X"
57 depends on BOARD_IWILL_DK8X
58
59config HW_MEM_HOLE_SIZEK
60 hex
61 default 0x100000
62 depends on BOARD_IWILL_DK8X
63
64config MAX_CPUS
65 int
Patrick Georgi29647d92010-01-25 07:56:01 +0000[diff] [blame^]66 default 2
Patrick Georgi91ff0df2009-10-09 12:32:52 +0000[diff] [blame]67 depends on BOARD_IWILL_DK8X
68
69config MAX_PHYSICAL_CPUS
70 int
71 default 2
72 depends on BOARD_IWILL_DK8X
73
74config HW_MEM_HOLE_SIZE_AUTO_INC
75 bool
76 default n
77 depends on BOARD_IWILL_DK8X
78
79config SB_HT_CHAIN_ON_BUS0
80 int
Patrick Georgi29647d92010-01-25 07:56:01 +0000[diff] [blame^]81 default 0
Patrick Georgi91ff0df2009-10-09 12:32:52 +0000[diff] [blame]82 depends on BOARD_IWILL_DK8X
83
84config HT_CHAIN_END_UNITID_BASE
85 hex
Patrick Georgi29647d92010-01-25 07:56:01 +0000[diff] [blame^]86 default 0x20
Patrick Georgi91ff0df2009-10-09 12:32:52 +0000[diff] [blame]87 depends on BOARD_IWILL_DK8X
88
89config HT_CHAIN_UNITID_BASE
90 hex
Patrick Georgi29647d92010-01-25 07:56:01 +0000[diff] [blame^]91 default 0x1
Patrick Georgi91ff0df2009-10-09 12:32:52 +0000[diff] [blame]92 depends on BOARD_IWILL_DK8X
93
94config USE_INIT
95 bool
96 default n
97 depends on BOARD_IWILL_DK8X
98
99config SERIAL_CPU_INIT
100 bool
101 default n
102 depends on BOARD_IWILL_DK8X
103
104config IRQ_SLOT_COUNT
105 int
106 default 11
107 depends on BOARD_IWILL_DK8X