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review.coreboot.org / coreboot / 29647d97c5e66484ab5c8b56ede57329ab5410c4 / . / src / mainboard / intel / mtarvon / Kconfig
blob: f7df636f97843970909007c7c888db32fa89ea42 [file] [log] [blame]
Patrick Georgi88f55b22009-09-25 18:43:02 +0000[diff] [blame]1config BOARD_INTEL_MTARVON
Uwe Hermann120bff82009-09-29 18:15:06 +0000[diff] [blame]2 bool "3100 devkit (Mt. Arvon)"
Patrick Georgi88f55b22009-09-25 18:43:02 +0000[diff] [blame]3 select ARCH_X86
4 select CPU_INTEL_SOCKET_MPGA479M
5 select NORTHBRIDGE_INTEL_I3100
6 select SOUTHBRIDGE_INTEL_I3100
7 select SUPERIO_INTEL_I3100
8 select HAVE_PIRQ_TABLE
Myles Watsonb8e20272009-10-15 13:35:47 +0000[diff] [blame]9 select HAVE_MP_TABLE
Patrick Georgi88f55b22009-09-25 18:43:02 +0000[diff] [blame]10 select UDELAY_TSC
Uwe Hermannd65509d2009-10-16 17:37:20 +0000[diff] [blame]11 select BOARD_ROMSIZE_KB_2048
Patrick Georgi88f55b22009-09-25 18:43:02 +0000[diff] [blame]12
13config MAINBOARD_DIR
14 string
15 default intel/mtarvon
16 depends on BOARD_INTEL_MTARVON
17
18config LB_CKS_RANGE_END
19 int
20 default 122
21 depends on BOARD_INTEL_MTARVON
22
23config LB_CKS_LOC
24 int
25 default 123
26 depends on BOARD_INTEL_MTARVON
27
28config MAINBOARD_PART_NUMBER
29 string
Uwe Hermann4e015eb2009-10-20 13:55:35 +0000[diff] [blame]30 default "3100 devkit (Mt. Arvon)"
Patrick Georgi88f55b22009-09-25 18:43:02 +0000[diff] [blame]31 depends on BOARD_INTEL_MTARVON
32
33config HAVE_OPTION_TABLE
34 bool
35 default n
36 depends on BOARD_INTEL_MTARVON
37
38config IRQ_SLOT_COUNT
39 int
40 default 1
41 depends on BOARD_INTEL_MTARVON
Patrick Georgi4638c922009-11-27 11:03:20 +0000[diff] [blame]42
43config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
44 hex
45 default 0x8086
46 depends on BOARD_INTEL_MTARVON
47
48config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
49 hex
50 default 0x2680
51 depends on BOARD_INTEL_MTARVON
Patrick Georgi29647d92010-01-25 07:56:01 +0000[diff] [blame^]52
53config MAX_CPUS
54 int
55 default 4
56 depends on BOARD_INTEL_MTARVON