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review.coreboot.org / coreboot / 29647d97c5e66484ab5c8b56ede57329ab5410c4 / . / src / mainboard / intel / d945gclf / Kconfig
blob: cd172baf62e16ac0580cdc32c3c7534257ce0a0c [file] [log] [blame]
Uwe Hermann2d2f0c12009-10-28 17:36:11 +0000[diff] [blame]1##
2## This file is part of the coreboot project.
3##
4## Copyright (C) 2009 coresystems GmbH
5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; version 2 of the License.
9##
10## This program is distributed in the hope that it will be useful,
11## but WITHOUT ANY WARRANTY; without even the implied warranty of
12## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13## GNU General Public License for more details.
14##
15## You should have received a copy of the GNU General Public License
16## along with this program; if not, write to the Free Software
17## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18##
19
Stefan Reinauer1a08f582009-10-28 16:52:48 +0000[diff] [blame]20config BOARD_INTEL_D945GCLF
21 bool "D945GCLF"
22 select ARCH_X86
23 select CPU_INTEL_CORE
Myles Watson59968f52009-12-02 05:43:50 +0000[diff] [blame]24 select CPU_INTEL_SOCKET_441
Stefan Reinauer1a08f582009-10-28 16:52:48 +0000[diff] [blame]25 select NORTHBRIDGE_INTEL_I945
26 select SOUTHBRIDGE_INTEL_I82801GX
Myles Watson4ec4fbe2009-10-28 18:51:47 +0000[diff] [blame]27 select SUPERIO_SMSC_LPC47M15X
Stefan Reinauer1a08f582009-10-28 16:52:48 +0000[diff] [blame]28 select HAVE_PIRQ_TABLE
29 select HAVE_MP_TABLE
Patrick Georgid5663ba2010-01-18 17:30:36 +0000[diff] [blame]30 select HAVE_ACPI_TABLES
Stefan Reinauer1a08f582009-10-28 16:52:48 +0000[diff] [blame]31 select MMCONF_SUPPORT
32 select USE_PRINTK_IN_CAR
33 select AP_IN_SIPI_WAIT
34 select UDELAY_LAPIC
Stefan Reinauerf2da0d52010-01-16 16:39:50 +0000[diff] [blame]35 select HAVE_ACPI_TABLES
36 select HAVE_SMI_HANDLER
Patrick Georgi29647d92010-01-25 07:56:01 +0000[diff] [blame^]37 select BOARD_ROMSIZE_KB_512
Stefan Reinauer1a08f582009-10-28 16:52:48 +0000[diff] [blame]38
39config MAINBOARD_DIR
40 string
41 default intel/d945gclf
42 depends on BOARD_INTEL_D945GCLF
43
44config DCACHE_RAM_BASE
45 hex
46 default 0xffdf8000
47 depends on BOARD_INTEL_D945GCLF
48
49config DCACHE_RAM_SIZE
50 hex
51 default 0x8000
52 depends on BOARD_INTEL_D945GCLF
53
54config LB_CKS_RANGE_END
55 int
56 default 122
57 depends on BOARD_INTEL_D945GCLF
58
59config LB_CKS_LOC
60 int
61 default 123
62 depends on BOARD_INTEL_D945GCLF
63
64config MAINBOARD_PART_NUMBER
65 string
66 default "D945GCLF"
67 depends on BOARD_INTEL_D945GCLF
68
Myles Watson1a76ebe2009-12-02 21:11:12 +0000[diff] [blame]69config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
70 hex
71 default 0x464C
72 depends on BOARD_INTEL_D945GCLF
73
Stefan Reinauer1a08f582009-10-28 16:52:48 +0000[diff] [blame]74config MMCONF_BASE_ADDRESS
75 hex
76 default 0xf0000000
77 depends on BOARD_INTEL_D945GCLF
78
79config IRQ_SLOT_COUNT
80 int
81 default 18
82 depends on BOARD_INTEL_D945GCLF
83
Patrick Georgi29647d92010-01-25 07:56:01 +0000[diff] [blame^]84config MAX_CPUS
85 int
86 default 4
87 depends on BOARD_INTEL_D945GCLF
88
Stefan Reinauer1a08f582009-10-28 16:52:48 +0000[diff] [blame]89config MAX_PHYSICAL_CPUS
90 int
91 default 2
92 depends on BOARD_INTEL_D945GCLF
Myles Watson4ec4fbe2009-10-28 18:51:47 +0000[diff] [blame]93
94config HAVE_INIT_TIMER
95 bool
96 default n
97 depends on BOARD_INTEL_D945GCLF