Angel Pons | d28443e | 2020-04-05 13:22:44 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Matt DeVillier | c12e5ae | 2016-11-27 02:19:02 -0600 | [diff] [blame] | 2 | |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 3 | #include <acpi/acpi.h> |
Matt DeVillier | c12e5ae | 2016-11-27 02:19:02 -0600 | [diff] [blame] | 4 | #include <console/console.h> |
| 5 | #include <cpu/x86/smm.h> |
Matt DeVillier | c12e5ae | 2016-11-27 02:19:02 -0600 | [diff] [blame] | 6 | #include <southbridge/intel/lynxpoint/pch.h> |
| 7 | #include <southbridge/intel/common/gpio.h> |
| 8 | #include <southbridge/intel/lynxpoint/me.h> |
| 9 | #include <northbridge/intel/haswell/haswell.h> |
| 10 | #include <cpu/intel/haswell/haswell.h> |
Matt DeVillier | c12e5ae | 2016-11-27 02:19:02 -0600 | [diff] [blame] | 11 | |
| 12 | /* Include EC functions */ |
| 13 | #include <ec/google/chromeec/ec.h> |
Kyösti Mälkki | 923b8ec | 2022-11-29 07:36:44 +0200 | [diff] [blame] | 14 | #include <ec/google/chromeec/smm.h> |
Matt DeVillier | c12e5ae | 2016-11-27 02:19:02 -0600 | [diff] [blame] | 15 | #include "ec.h" |
| 16 | |
| 17 | /* Codec enable: GPIO45 */ |
| 18 | #define GPIO_PP3300_CODEC_EN 45 |
| 19 | /* GPIO46 controls the WLAN_DISABLE_L signal. */ |
| 20 | #define GPIO_WLAN_DISABLE_L 46 |
| 21 | #define GPIO_LTE_DISABLE_L 59 |
| 22 | |
Matt DeVillier | c12e5ae | 2016-11-27 02:19:02 -0600 | [diff] [blame] | 23 | /* gpi_sts is GPIO 47:32 */ |
| 24 | void mainboard_smi_gpi(u32 gpi_sts) |
| 25 | { |
Kyösti Mälkki | 83faa5d | 2023-01-05 15:39:16 +0200 | [diff] [blame] | 26 | if (gpi_sts & (1 << (EC_SMI_GPI - 32))) |
| 27 | chromeec_smi_process_events(); |
Matt DeVillier | c12e5ae | 2016-11-27 02:19:02 -0600 | [diff] [blame] | 28 | } |
| 29 | |
| 30 | void mainboard_smi_sleep(u8 slp_typ) |
| 31 | { |
| 32 | /* Disable USB charging if required */ |
Kyösti Mälkki | 027f86e | 2022-12-02 15:30:10 +0200 | [diff] [blame] | 33 | chromeec_set_usb_charge_mode(slp_typ); |
| 34 | |
Matt DeVillier | c12e5ae | 2016-11-27 02:19:02 -0600 | [diff] [blame] | 35 | switch (slp_typ) { |
| 36 | case ACPI_S3: |
Matt DeVillier | c12e5ae | 2016-11-27 02:19:02 -0600 | [diff] [blame] | 37 | /* Prevent leak from standby rail to WLAN rail in S3. */ |
| 38 | set_gpio(GPIO_WLAN_DISABLE_L, 0); |
| 39 | set_gpio(GPIO_PP3300_CODEC_EN, 0); |
| 40 | /* Disable LTE */ |
| 41 | set_gpio(GPIO_LTE_DISABLE_L, 0); |
| 42 | |
| 43 | /* Enable wake events */ |
| 44 | google_chromeec_set_wake_mask(MAINBOARD_EC_S3_WAKE_EVENTS); |
| 45 | break; |
| 46 | case ACPI_S4: |
| 47 | case ACPI_S5: |
Matt DeVillier | c12e5ae | 2016-11-27 02:19:02 -0600 | [diff] [blame] | 48 | /* Prevent leak from standby rail to WLAN rail in S5. */ |
| 49 | set_gpio(GPIO_WLAN_DISABLE_L, 0); |
| 50 | set_gpio(GPIO_PP3300_CODEC_EN, 0); |
| 51 | /* Disable LTE */ |
| 52 | set_gpio(GPIO_LTE_DISABLE_L, 0); |
| 53 | |
| 54 | /* Enable wake events */ |
| 55 | google_chromeec_set_wake_mask(MAINBOARD_EC_S5_WAKE_EVENTS); |
| 56 | break; |
| 57 | } |
| 58 | |
| 59 | /* Disable SCI and SMI events */ |
| 60 | google_chromeec_set_smi_mask(0); |
| 61 | google_chromeec_set_sci_mask(0); |
| 62 | |
| 63 | /* Clear pending events that may trigger immediate wake */ |
Rob Barnes | f1ade48 | 2021-06-14 10:22:21 -0600 | [diff] [blame] | 64 | while (google_chromeec_get_event() != EC_HOST_EVENT_NONE) |
| 65 | ; |
Matt DeVillier | c12e5ae | 2016-11-27 02:19:02 -0600 | [diff] [blame] | 66 | } |
| 67 | |
Matt DeVillier | c12e5ae | 2016-11-27 02:19:02 -0600 | [diff] [blame] | 68 | int mainboard_smi_apmc(u8 apmc) |
| 69 | { |
Kyösti Mälkki | 923b8ec | 2022-11-29 07:36:44 +0200 | [diff] [blame] | 70 | chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS, MAINBOARD_EC_SMI_EVENTS); |
Matt DeVillier | c12e5ae | 2016-11-27 02:19:02 -0600 | [diff] [blame] | 71 | return 0; |
| 72 | } |