Patrick Georgi | 7333a11 | 2020-05-08 20:48:04 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Philipp Deppenwiese | d8fe443 | 2016-03-18 00:52:54 +0100 | [diff] [blame] | 2 | |
| 3 | #define ME_NOT_PRESENT 0 |
| 4 | #define ME_FOUND_NOTHING 1 |
| 5 | #define ME_FOUND_SOMETHING_NOT_SURE 2 |
| 6 | #define ME_CAN_DISABLE_IF_PRESENT 3 |
| 7 | #define ME_PRESENT_CAN_DISABLE 4 |
| 8 | #define ME_PRESENT_CANNOT_DISABLE 5 |
| 9 | |
Philipp Deppenwiese | 73add17 | 2016-08-26 02:10:51 +0200 | [diff] [blame] | 10 | #define INTELMETOOL_VERSION "1.1" |
Philipp Deppenwiese | d8fe443 | 2016-03-18 00:52:54 +0100 | [diff] [blame] | 11 | |
Patrick Rudolph | 5e9dc37 | 2017-11-19 09:11:58 +0100 | [diff] [blame] | 12 | #define GPLV2COPYRIGHT \ |
| 13 | "This program is free software: you can redistribute it and/or modify\n" \ |
| 14 | "it under the terms of the GNU General Public License as published by\n" \ |
| 15 | "the Free Software Foundation, version 2 of the License.\n\n" \ |
| 16 | "This program is distributed in the hope that it will be useful,\n" \ |
| 17 | "but WITHOUT ANY WARRANTY; without even the implied warranty of\n" \ |
| 18 | "MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n" \ |
| 19 | "GNU General Public License for more details.\n\n" |
| 20 | |
Philipp Deppenwiese | d8fe443 | 2016-03-18 00:52:54 +0100 | [diff] [blame] | 21 | #if defined(__GLIBC__) |
| 22 | #include <sys/io.h> |
| 23 | #endif |
| 24 | #if (defined(__MACH__) && defined(__APPLE__)) |
Paul Menzel | a8843de | 2017-06-05 12:33:23 +0200 | [diff] [blame] | 25 | /* DirectHW is available here: https://www.coreboot.org/DirectHW */ |
Philipp Deppenwiese | d8fe443 | 2016-03-18 00:52:54 +0100 | [diff] [blame] | 26 | #define __DARWIN__ |
| 27 | #include <DirectHW/DirectHW.h> |
| 28 | #endif |
| 29 | #ifdef __NetBSD__ |
| 30 | #include <pciutils/pci.h> |
| 31 | #else |
| 32 | #include <pci/pci.h> |
| 33 | #endif |
| 34 | |
| 35 | #define CNRM "\x1B[0m" |
| 36 | #define CRED "\x1B[31m" |
| 37 | #define CGRN "\x1B[32m" |
| 38 | #define CYEL "\x1B[33m" |
| 39 | #define CBLU "\x1B[34m" |
| 40 | #define CMAG "\x1B[35m" |
| 41 | #define CCYN "\x1B[36m" |
| 42 | #define CWHT "\x1B[37m" |
| 43 | #define RESET "\033[0m" |
| 44 | |
Philipp Deppenwiese | 73add17 | 2016-08-26 02:10:51 +0200 | [diff] [blame] | 45 | #define CPU_ID_SIZE 13 |
| 46 | #define FD2 0x3428 |
| 47 | #define ME_COMMAND_DELAY 10000 |
| 48 | #define ME_MESSAGE_LEN 256 |
| 49 | |
Philipp Deppenwiese | d8fe443 | 2016-03-18 00:52:54 +0100 | [diff] [blame] | 50 | extern int debug; |
| 51 | |
Maximilian Schander | df5b83f | 2017-10-28 18:33:07 +0200 | [diff] [blame] | 52 | #define PCI_VENDOR_ID_INTEL 0x8086 |
| 53 | |
Damien Zammit | f4491e7 | 2019-02-23 14:01:00 +1100 | [diff] [blame] | 54 | // Chipset does not have ME |
| 55 | #define PCI_DEVICE_ID_INTEL_82810 0x7120 |
| 56 | #define PCI_DEVICE_ID_INTEL_82810_DC 0x7122 |
| 57 | #define PCI_DEVICE_ID_INTEL_82810E_DC 0x7124 |
| 58 | #define PCI_DEVICE_ID_INTEL_82830M 0x3575 |
| 59 | #define PCI_DEVICE_ID_INTEL_82845 0x1a30 |
| 60 | #define PCI_DEVICE_ID_INTEL_82865 0x2570 |
| 61 | #define PCI_DEVICE_ID_INTEL_82915 0x2580 |
| 62 | #define PCI_DEVICE_ID_INTEL_82945P 0x2770 |
| 63 | #define PCI_DEVICE_ID_INTEL_82945GM 0x27a0 |
| 64 | #define PCI_DEVICE_ID_INTEL_82945GSE 0x27ac |
| 65 | #define PCI_DEVICE_ID_INTEL_82X58 0x3405 |
| 66 | #define PCI_DEVICE_ID_INTEL_ATOM_DXXX 0xa000 |
| 67 | #define PCI_DEVICE_ID_INTEL_I63XX 0x2670 |
| 68 | #define PCI_DEVICE_ID_INTEL_I5000X 0x25c0 |
| 69 | #define PCI_DEVICE_ID_INTEL_I5000Z 0x25d0 |
| 70 | #define PCI_DEVICE_ID_INTEL_I5000V 0x25d4 |
| 71 | #define PCI_DEVICE_ID_INTEL_I5000P 0x25d8 |
| 72 | #define PCI_DEVICE_ID_INTEL_82443LX 0x7180 |
| 73 | #define PCI_DEVICE_ID_INTEL_82443BX 0x7190 |
| 74 | #define PCI_DEVICE_ID_INTEL_82443BX_NO_AGP 0x7192 |
| 75 | #define PCI_DEVICE_ID_INTEL_82371XX 0x7110 |
| 76 | #define PCI_DEVICE_ID_INTEL_ICH 0x2410 |
| 77 | #define PCI_DEVICE_ID_INTEL_ICH0 0x2420 |
| 78 | #define PCI_DEVICE_ID_INTEL_ICH2 0x2440 |
| 79 | #define PCI_DEVICE_ID_INTEL_ICH4 0x24c0 |
| 80 | #define PCI_DEVICE_ID_INTEL_ICH4M 0x24cc |
| 81 | #define PCI_DEVICE_ID_INTEL_ICH5 0x24d0 |
| 82 | #define PCI_DEVICE_ID_INTEL_ICH6 0x2640 |
| 83 | #define PCI_DEVICE_ID_INTEL_ICH7DH 0x27b0 |
| 84 | #define PCI_DEVICE_ID_INTEL_ICH7 0x27b8 |
| 85 | #define PCI_DEVICE_ID_INTEL_ICH7M 0x27b9 |
| 86 | #define PCI_DEVICE_ID_INTEL_ICH7MDH 0x27bd |
| 87 | #define PCI_DEVICE_ID_INTEL_NM10 0x27bc |
| 88 | |
| 89 | #define PCI_DEV_NO_ME(x) ( \ |
| 90 | ((x) == PCI_DEVICE_ID_INTEL_82810) || \ |
| 91 | ((x) == PCI_DEVICE_ID_INTEL_82810_DC) || \ |
| 92 | ((x) == PCI_DEVICE_ID_INTEL_82810E_DC) || \ |
| 93 | ((x) == PCI_DEVICE_ID_INTEL_82830M) || \ |
| 94 | ((x) == PCI_DEVICE_ID_INTEL_82845) || \ |
| 95 | ((x) == PCI_DEVICE_ID_INTEL_82865) || \ |
| 96 | ((x) == PCI_DEVICE_ID_INTEL_82915) || \ |
| 97 | ((x) == PCI_DEVICE_ID_INTEL_82945P) || \ |
| 98 | ((x) == PCI_DEVICE_ID_INTEL_82945GM) || \ |
| 99 | ((x) == PCI_DEVICE_ID_INTEL_82945GSE) || \ |
| 100 | ((x) == PCI_DEVICE_ID_INTEL_82X58) || \ |
| 101 | ((x) == PCI_DEVICE_ID_INTEL_ATOM_DXXX) || \ |
| 102 | ((x) == PCI_DEVICE_ID_INTEL_I63XX) || \ |
| 103 | ((x) == PCI_DEVICE_ID_INTEL_I5000X) || \ |
| 104 | ((x) == PCI_DEVICE_ID_INTEL_I5000Z) || \ |
| 105 | ((x) == PCI_DEVICE_ID_INTEL_I5000V) || \ |
| 106 | ((x) == PCI_DEVICE_ID_INTEL_I5000P) || \ |
| 107 | ((x) == PCI_DEVICE_ID_INTEL_82443LX) || \ |
| 108 | ((x) == PCI_DEVICE_ID_INTEL_82443BX) || \ |
| 109 | ((x) == PCI_DEVICE_ID_INTEL_82443BX_NO_AGP) || \ |
| 110 | ((x) == PCI_DEVICE_ID_INTEL_82371XX) || \ |
| 111 | ((x) == PCI_DEVICE_ID_INTEL_ICH) || \ |
| 112 | ((x) == PCI_DEVICE_ID_INTEL_ICH0) || \ |
| 113 | ((x) == PCI_DEVICE_ID_INTEL_ICH2) || \ |
| 114 | ((x) == PCI_DEVICE_ID_INTEL_ICH4) || \ |
| 115 | ((x) == PCI_DEVICE_ID_INTEL_ICH4M) || \ |
| 116 | ((x) == PCI_DEVICE_ID_INTEL_ICH5) || \ |
| 117 | ((x) == PCI_DEVICE_ID_INTEL_ICH6) || \ |
| 118 | ((x) == PCI_DEVICE_ID_INTEL_ICH7DH) || \ |
| 119 | ((x) == PCI_DEVICE_ID_INTEL_ICH7) || \ |
| 120 | ((x) == PCI_DEVICE_ID_INTEL_ICH7M) || \ |
| 121 | ((x) == PCI_DEVICE_ID_INTEL_ICH7MDH) || \ |
| 122 | ((x) == PCI_DEVICE_ID_INTEL_NM10)) |
| 123 | |
Philipp Deppenwiese | d8fe443 | 2016-03-18 00:52:54 +0100 | [diff] [blame] | 124 | // Definitely has ME and can be disabled |
| 125 | #define PCI_DEVICE_ID_INTEL_ICH8ME 0x2811 |
| 126 | #define PCI_DEVICE_ID_INTEL_ICH9ME 0x2917 |
| 127 | #define PCI_DEVICE_ID_INTEL_ICH9M 0x2919 |
| 128 | |
| 129 | #define PCI_DEV_HAS_ME_DISABLE(x) ( \ |
Patrick Rudolph | 5e9dc37 | 2017-11-19 09:11:58 +0100 | [diff] [blame] | 130 | ((x) == PCI_DEVICE_ID_INTEL_ICH8ME) || \ |
| 131 | ((x) == PCI_DEVICE_ID_INTEL_ICH9ME) || \ |
Damien Zammit | f4491e7 | 2019-02-23 14:01:00 +1100 | [diff] [blame] | 132 | ((x) == PCI_DEVICE_ID_INTEL_ICH9M)) |
Philipp Deppenwiese | d8fe443 | 2016-03-18 00:52:54 +0100 | [diff] [blame] | 133 | |
| 134 | // Definitely has ME and is very difficult to remove |
| 135 | #define PCI_DEVICE_ID_INTEL_ICH10R 0x3a16 |
| 136 | #define PCI_DEVICE_ID_INTEL_3400_DESKTOP 0x3b00 |
| 137 | #define PCI_DEVICE_ID_INTEL_3400_MOBILE 0x3b01 |
| 138 | #define PCI_DEVICE_ID_INTEL_P55 0x3b02 |
| 139 | #define PCI_DEVICE_ID_INTEL_PM55 0x3b03 |
| 140 | #define PCI_DEVICE_ID_INTEL_H55 0x3b06 |
| 141 | #define PCI_DEVICE_ID_INTEL_QM57 0x3b07 |
| 142 | #define PCI_DEVICE_ID_INTEL_H57 0x3b08 |
| 143 | #define PCI_DEVICE_ID_INTEL_HM55 0x3b09 |
| 144 | #define PCI_DEVICE_ID_INTEL_Q57 0x3b0a |
| 145 | #define PCI_DEVICE_ID_INTEL_HM57 0x3b0b |
| 146 | #define PCI_DEVICE_ID_INTEL_3400_MOBILE_SFF 0x3b0d |
| 147 | #define PCI_DEVICE_ID_INTEL_B55_A 0x3b0e |
| 148 | #define PCI_DEVICE_ID_INTEL_QS57 0x3b0f |
| 149 | #define PCI_DEVICE_ID_INTEL_3400 0x3b12 |
| 150 | #define PCI_DEVICE_ID_INTEL_3420 0x3b14 |
| 151 | #define PCI_DEVICE_ID_INTEL_3450 0x3b16 |
| 152 | #define PCI_DEVICE_ID_INTEL_B55_B 0x3b1e |
| 153 | #define PCI_DEVICE_ID_INTEL_Z68 0x1c44 |
| 154 | #define PCI_DEVICE_ID_INTEL_P67 0x1c46 |
| 155 | #define PCI_DEVICE_ID_INTEL_UM67 0x1c47 |
| 156 | #define PCI_DEVICE_ID_INTEL_HM65 0x1c49 |
| 157 | #define PCI_DEVICE_ID_INTEL_H67 0x1c4a |
| 158 | #define PCI_DEVICE_ID_INTEL_HM67 0x1c4b |
| 159 | #define PCI_DEVICE_ID_INTEL_Q65 0x1c4c |
| 160 | #define PCI_DEVICE_ID_INTEL_QS67 0x1c4d |
| 161 | #define PCI_DEVICE_ID_INTEL_Q67 0x1c4e |
| 162 | #define PCI_DEVICE_ID_INTEL_QM67 0x1c4f |
| 163 | #define PCI_DEVICE_ID_INTEL_B65 0x1c50 |
| 164 | #define PCI_DEVICE_ID_INTEL_C202 0x1c52 |
| 165 | #define PCI_DEVICE_ID_INTEL_C204 0x1c54 |
| 166 | #define PCI_DEVICE_ID_INTEL_C206 0x1c56 |
| 167 | #define PCI_DEVICE_ID_INTEL_H61 0x1c5c |
| 168 | #define PCI_DEVICE_ID_INTEL_Z77 0x1e44 |
| 169 | #define PCI_DEVICE_ID_INTEL_Z75 0x1e46 |
| 170 | #define PCI_DEVICE_ID_INTEL_Q77 0x1e47 |
| 171 | #define PCI_DEVICE_ID_INTEL_Q75 0x1e48 |
| 172 | #define PCI_DEVICE_ID_INTEL_B75 0x1e49 |
| 173 | #define PCI_DEVICE_ID_INTEL_H77 0x1e4a |
| 174 | #define PCI_DEVICE_ID_INTEL_C216 0x1e53 |
| 175 | #define PCI_DEVICE_ID_INTEL_QM77 0x1e55 |
| 176 | #define PCI_DEVICE_ID_INTEL_QS77 0x1e56 |
| 177 | #define PCI_DEVICE_ID_INTEL_HM77 0x1e57 |
| 178 | #define PCI_DEVICE_ID_INTEL_UM77 0x1e58 |
| 179 | #define PCI_DEVICE_ID_INTEL_HM76 0x1e59 |
| 180 | #define PCI_DEVICE_ID_INTEL_HM75 0x1e5d |
| 181 | #define PCI_DEVICE_ID_INTEL_HM70 0x1e5e |
| 182 | #define PCI_DEVICE_ID_INTEL_NM70 0x1e5f |
Philipp Deppenwiese | d8fe443 | 2016-03-18 00:52:54 +0100 | [diff] [blame] | 183 | #define PCI_DEVICE_ID_INTEL_DH89XXCC 0x2310 |
| 184 | #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_FULL 0x9c41 |
| 185 | #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_PREM 0x9c43 |
| 186 | #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_BASE 0x9c45 |
Damien Zammit | f4491e7 | 2019-02-23 14:01:00 +1100 | [diff] [blame] | 187 | #define PCI_DEVICE_ID_INTEL_H81 0x8c5c |
| 188 | #define PCI_DEVICE_ID_INTEL_B85 0x8c50 |
| 189 | #define PCI_DEVICE_ID_INTEL_Q85 0x8c4c |
| 190 | #define PCI_DEVICE_ID_INTEL_Q87 0x8c4e |
| 191 | #define PCI_DEVICE_ID_INTEL_QM87 0x8c4f |
| 192 | #define PCI_DEVICE_ID_INTEL_H87 0x8c4a |
| 193 | #define PCI_DEVICE_ID_INTEL_HM87 0x8c4b |
| 194 | #define PCI_DEVICE_ID_INTEL_Z87 0x8c44 |
Omar Pakker | a03609b4 | 2016-06-02 21:06:54 +0200 | [diff] [blame] | 195 | #define PCI_DEVICE_ID_INTEL_X99 0x8d47 |
Damien Zammit | f4491e7 | 2019-02-23 14:01:00 +1100 | [diff] [blame] | 196 | #define PCI_DEVICE_ID_INTEL_WILDCAT_LP1 0x9cc1 |
| 197 | #define PCI_DEVICE_ID_INTEL_WILDCAT_LP2 0x9cc2 |
| 198 | #define PCI_DEVICE_ID_INTEL_WILDCAT_LP3 0x9cc3 |
| 199 | #define PCI_DEVICE_ID_INTEL_WILDCAT_LP4 0x9cc5 |
| 200 | #define PCI_DEVICE_ID_INTEL_WILDCAT_LP5 0x9cc6 |
| 201 | #define PCI_DEVICE_ID_INTEL_WILDCAT_LP6 0x9cc7 |
| 202 | #define PCI_DEVICE_ID_INTEL_WILDCAT_LP7 0x9cc9 |
| 203 | #define PCI_DEVICE_ID_INTEL_SUNRISE_LP1 0x9d43 |
| 204 | #define PCI_DEVICE_ID_INTEL_SUNRISE_LP2 0x9d48 |
| 205 | #define PCI_DEVICE_ID_INTEL_SUNRISE_LP3 0x9d4e |
| 206 | #define PCI_DEVICE_ID_INTEL_SUNRISE_LP4 0x9d56 |
| 207 | #define PCI_DEVICE_ID_INTEL_SUNRISE_LP5 0x9d58 |
| 208 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H0 0xa140 |
| 209 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H1 0xa141 |
| 210 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H2 0xa142 |
| 211 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H3 0xa143 |
| 212 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H4 0xa144 |
| 213 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H5 0xa145 |
| 214 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H6 0xa146 |
| 215 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H7 0xa147 |
| 216 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H8 0xa148 |
| 217 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H9 0xa149 |
| 218 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H10 0xa14a |
| 219 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H11 0xa14b |
| 220 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H12 0xa14c |
| 221 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H13 0xa14d |
| 222 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H14 0xa14e |
| 223 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H15 0xa14f |
| 224 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H16 0xa150 |
| 225 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H17 0xa151 |
| 226 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H18 0xa152 |
| 227 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H19 0xa153 |
| 228 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H20 0xa154 |
| 229 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H21 0xa155 |
| 230 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H22 0xa156 |
| 231 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H23 0xa157 |
| 232 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H24 0xa158 |
| 233 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H25 0xa159 |
| 234 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H26 0xa15a |
| 235 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H27 0xa15b |
| 236 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H28 0xa15c |
| 237 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H29 0xa15d |
| 238 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H30 0xa15e |
| 239 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H31 0xa15f |
| 240 | #define PCI_DEVICE_ID_INTEL_LEWISBURG_1 0xa1c1 |
| 241 | #define PCI_DEVICE_ID_INTEL_LEWISBURG_2 0xa1c2 |
| 242 | #define PCI_DEVICE_ID_INTEL_LEWISBURG_3 0xa1c3 |
| 243 | #define PCI_DEVICE_ID_INTEL_LEWISBURG_4 0xa1c4 |
| 244 | #define PCI_DEVICE_ID_INTEL_LEWISBURG_5 0xa1c5 |
| 245 | #define PCI_DEVICE_ID_INTEL_LEWISBURG_6 0xa1c6 |
| 246 | #define PCI_DEVICE_ID_INTEL_LEWISBURG_7 0xa1c7 |
Philipp Deppenwiese | d8fe443 | 2016-03-18 00:52:54 +0100 | [diff] [blame] | 247 | |
| 248 | #define PCI_DEV_HAS_ME_DIFFICULT(x) ( \ |
Patrick Rudolph | 5e9dc37 | 2017-11-19 09:11:58 +0100 | [diff] [blame] | 249 | ((x) == PCI_DEVICE_ID_INTEL_ICH10R) || \ |
| 250 | ((x) == PCI_DEVICE_ID_INTEL_3400_DESKTOP) || \ |
| 251 | ((x) == PCI_DEVICE_ID_INTEL_3400_MOBILE) || \ |
Damien Zammit | f4491e7 | 2019-02-23 14:01:00 +1100 | [diff] [blame] | 252 | ((x) == PCI_DEVICE_ID_INTEL_P55) || \ |
| 253 | ((x) == PCI_DEVICE_ID_INTEL_PM55) || \ |
| 254 | ((x) == PCI_DEVICE_ID_INTEL_H55) || \ |
| 255 | ((x) == PCI_DEVICE_ID_INTEL_QM57) || \ |
| 256 | ((x) == PCI_DEVICE_ID_INTEL_H57) || \ |
| 257 | ((x) == PCI_DEVICE_ID_INTEL_HM55) || \ |
| 258 | ((x) == PCI_DEVICE_ID_INTEL_Q57) || \ |
| 259 | ((x) == PCI_DEVICE_ID_INTEL_HM57) || \ |
Patrick Rudolph | 5e9dc37 | 2017-11-19 09:11:58 +0100 | [diff] [blame] | 260 | ((x) == PCI_DEVICE_ID_INTEL_3400_MOBILE_SFF) || \ |
Damien Zammit | f4491e7 | 2019-02-23 14:01:00 +1100 | [diff] [blame] | 261 | ((x) == PCI_DEVICE_ID_INTEL_B55_A) || \ |
| 262 | ((x) == PCI_DEVICE_ID_INTEL_QS57) || \ |
| 263 | ((x) == PCI_DEVICE_ID_INTEL_3400) || \ |
| 264 | ((x) == PCI_DEVICE_ID_INTEL_3420) || \ |
| 265 | ((x) == PCI_DEVICE_ID_INTEL_3450) || \ |
| 266 | ((x) == PCI_DEVICE_ID_INTEL_B55_B) || \ |
| 267 | ((x) == PCI_DEVICE_ID_INTEL_Z68) || \ |
| 268 | ((x) == PCI_DEVICE_ID_INTEL_P67) || \ |
| 269 | ((x) == PCI_DEVICE_ID_INTEL_UM67) || \ |
| 270 | ((x) == PCI_DEVICE_ID_INTEL_HM65) || \ |
| 271 | ((x) == PCI_DEVICE_ID_INTEL_H67) || \ |
| 272 | ((x) == PCI_DEVICE_ID_INTEL_HM67) || \ |
| 273 | ((x) == PCI_DEVICE_ID_INTEL_Q65) || \ |
| 274 | ((x) == PCI_DEVICE_ID_INTEL_QS67) || \ |
| 275 | ((x) == PCI_DEVICE_ID_INTEL_Q67) || \ |
| 276 | ((x) == PCI_DEVICE_ID_INTEL_QM67) || \ |
| 277 | ((x) == PCI_DEVICE_ID_INTEL_B65) || \ |
| 278 | ((x) == PCI_DEVICE_ID_INTEL_C202) || \ |
| 279 | ((x) == PCI_DEVICE_ID_INTEL_C204) || \ |
| 280 | ((x) == PCI_DEVICE_ID_INTEL_C206) || \ |
| 281 | ((x) == PCI_DEVICE_ID_INTEL_H61) || \ |
| 282 | ((x) == PCI_DEVICE_ID_INTEL_Z77) || \ |
| 283 | ((x) == PCI_DEVICE_ID_INTEL_Z75) || \ |
| 284 | ((x) == PCI_DEVICE_ID_INTEL_Q77) || \ |
| 285 | ((x) == PCI_DEVICE_ID_INTEL_Q75) || \ |
| 286 | ((x) == PCI_DEVICE_ID_INTEL_B75) || \ |
| 287 | ((x) == PCI_DEVICE_ID_INTEL_H77) || \ |
| 288 | ((x) == PCI_DEVICE_ID_INTEL_C216) || \ |
| 289 | ((x) == PCI_DEVICE_ID_INTEL_QM77) || \ |
| 290 | ((x) == PCI_DEVICE_ID_INTEL_QS77) || \ |
| 291 | ((x) == PCI_DEVICE_ID_INTEL_HM77) || \ |
| 292 | ((x) == PCI_DEVICE_ID_INTEL_UM77) || \ |
| 293 | ((x) == PCI_DEVICE_ID_INTEL_HM76) || \ |
| 294 | ((x) == PCI_DEVICE_ID_INTEL_HM75) || \ |
| 295 | ((x) == PCI_DEVICE_ID_INTEL_HM70) || \ |
| 296 | ((x) == PCI_DEVICE_ID_INTEL_NM70) || \ |
| 297 | ((x) == PCI_DEVICE_ID_INTEL_DH89XXCC) || \ |
| 298 | ((x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_FULL) || \ |
| 299 | ((x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_PREM) || \ |
| 300 | ((x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_BASE) || \ |
| 301 | ((x) == PCI_DEVICE_ID_INTEL_H81) || \ |
| 302 | ((x) == PCI_DEVICE_ID_INTEL_B85) || \ |
| 303 | ((x) == PCI_DEVICE_ID_INTEL_Q85) || \ |
| 304 | ((x) == PCI_DEVICE_ID_INTEL_Q87) || \ |
| 305 | ((x) == PCI_DEVICE_ID_INTEL_QM87) || \ |
| 306 | ((x) == PCI_DEVICE_ID_INTEL_H87) || \ |
| 307 | ((x) == PCI_DEVICE_ID_INTEL_HM87) || \ |
| 308 | ((x) == PCI_DEVICE_ID_INTEL_Z87) || \ |
| 309 | ((x) == PCI_DEVICE_ID_INTEL_X99) || \ |
| 310 | ((x) == PCI_DEVICE_ID_INTEL_WILDCAT_LP1) || \ |
| 311 | ((x) == PCI_DEVICE_ID_INTEL_WILDCAT_LP2) || \ |
| 312 | ((x) == PCI_DEVICE_ID_INTEL_WILDCAT_LP3) || \ |
| 313 | ((x) == PCI_DEVICE_ID_INTEL_WILDCAT_LP4) || \ |
| 314 | ((x) == PCI_DEVICE_ID_INTEL_WILDCAT_LP5) || \ |
| 315 | ((x) == PCI_DEVICE_ID_INTEL_WILDCAT_LP6) || \ |
| 316 | ((x) == PCI_DEVICE_ID_INTEL_WILDCAT_LP7) || \ |
| 317 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_LP1) || \ |
| 318 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_LP2) || \ |
| 319 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_LP3) || \ |
| 320 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_LP4) || \ |
| 321 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_LP5) || \ |
| 322 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H0) || \ |
| 323 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H1) || \ |
| 324 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H2) || \ |
| 325 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H3) || \ |
| 326 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H4) || \ |
| 327 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H5) || \ |
| 328 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H6) || \ |
| 329 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H7) || \ |
| 330 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H8) || \ |
| 331 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H9) || \ |
| 332 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H10) || \ |
| 333 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H11) || \ |
| 334 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H12) || \ |
| 335 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H13) || \ |
| 336 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H14) || \ |
| 337 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H15) || \ |
| 338 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H16) || \ |
| 339 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H17) || \ |
| 340 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H18) || \ |
| 341 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H19) || \ |
| 342 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H20) || \ |
| 343 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H21) || \ |
| 344 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H22) || \ |
| 345 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H23) || \ |
| 346 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H24) || \ |
| 347 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H25) || \ |
| 348 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H26) || \ |
| 349 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H27) || \ |
| 350 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H28) || \ |
| 351 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H29) || \ |
| 352 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H30) || \ |
| 353 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H31) || \ |
| 354 | ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_1) || \ |
| 355 | ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_2) || \ |
| 356 | ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_3) || \ |
| 357 | ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_4) || \ |
| 358 | ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_5) || \ |
| 359 | ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_6) || \ |
| 360 | ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_7) || \ |
| 361 | 0) |
Philipp Deppenwiese | d8fe443 | 2016-03-18 00:52:54 +0100 | [diff] [blame] | 362 | |
| 363 | // Not sure if ME present, but should be able to disable it easily |
| 364 | #define PCI_DEVICE_ID_INTEL_ICH8 0x2810 |
| 365 | #define PCI_DEVICE_ID_INTEL_ICH8M 0x2815 |
| 366 | #define PCI_DEVICE_ID_INTEL_ICH9DH 0x2912 |
| 367 | #define PCI_DEVICE_ID_INTEL_ICH9DO 0x2914 |
| 368 | #define PCI_DEVICE_ID_INTEL_ICH9R 0x2916 |
| 369 | #define PCI_DEVICE_ID_INTEL_ICH9 0x2918 |
| 370 | |
| 371 | #define PCI_DEV_CAN_DISABLE_ME_IF_PRESENT(x) ( \ |
Damien Zammit | f4491e7 | 2019-02-23 14:01:00 +1100 | [diff] [blame] | 372 | ((x) == PCI_DEVICE_ID_INTEL_ICH8) || \ |
| 373 | ((x) == PCI_DEVICE_ID_INTEL_ICH8M) || \ |
| 374 | ((x) == PCI_DEVICE_ID_INTEL_ICH9DH) || \ |
| 375 | ((x) == PCI_DEVICE_ID_INTEL_ICH9DO) || \ |
| 376 | ((x) == PCI_DEVICE_ID_INTEL_ICH9R) || \ |
| 377 | ((x) == PCI_DEVICE_ID_INTEL_ICH9)) |
Philipp Deppenwiese | d8fe443 | 2016-03-18 00:52:54 +0100 | [diff] [blame] | 378 | |
| 379 | // Not sure at all |
| 380 | #define PCI_DEVICE_ID_INTEL_SCH_POULSBO_LPC 0x8119 |
| 381 | #define PCI_DEVICE_ID_INTEL_SCH_POULSBO 0x8100 |
| 382 | |
| 383 | #define PCI_DEV_ME_NOT_SURE(x) ( \ |
Patrick Rudolph | 5e9dc37 | 2017-11-19 09:11:58 +0100 | [diff] [blame] | 384 | ((x) == PCI_DEVICE_ID_INTEL_SCH_POULSBO_LPC) || \ |
| 385 | ((x) == PCI_DEVICE_ID_INTEL_SCH_POULSBO)) |
Philipp Deppenwiese | d8fe443 | 2016-03-18 00:52:54 +0100 | [diff] [blame] | 386 | |
Damien Zammit | f4491e7 | 2019-02-23 14:01:00 +1100 | [diff] [blame] | 387 | // ME PCI IDs (HECI) |
Philipp Deppenwiese | d8fe443 | 2016-03-18 00:52:54 +0100 | [diff] [blame] | 388 | #define PCI_DEVICE_ID_INTEL_COUGARPOINT_1 0x1C3A /* Cougar Point */ |
| 389 | #define PCI_DEVICE_ID_INTEL_PATSBURG_1 0x1D3A /* C600/X79 Patsburg */ |
| 390 | #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_1 0x1CBA /* Panther Point */ |
| 391 | #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_2 0x1DBA /* Panther Point */ |
| 392 | #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_3 0x1E3A /* Panther Point */ |
| 393 | #define PCI_DEVICE_ID_INTEL_CAVECREEK 0x2364 /* Cave Creek */ |
| 394 | #define PCI_DEVICE_ID_INTEL_BEARLAKE_1 0x28B4 /* Bearlake */ |
| 395 | #define PCI_DEVICE_ID_INTEL_BEARLAKE_2 0x28C4 /* Bearlake */ |
| 396 | #define PCI_DEVICE_ID_INTEL_BEARLAKE_3 0x28D4 /* Bearlake */ |
| 397 | #define PCI_DEVICE_ID_INTEL_BEARLAKE_4 0x28E4 /* Bearlake */ |
| 398 | #define PCI_DEVICE_ID_INTEL_BEARLAKE_5 0x28F4 /* Bearlake */ |
| 399 | #define PCI_DEVICE_ID_INTEL_82946GZ 0x2974 /* 82946GZ/GL */ |
| 400 | #define PCI_DEVICE_ID_INTEL_82G35 0x2984 /* 82G35 Express */ |
| 401 | #define PCI_DEVICE_ID_INTEL_82Q963 0x2994 /* 82Q963/Q965 */ |
| 402 | #define PCI_DEVICE_ID_INTEL_82P965 0x29A4 /* 82P965/G965 */ |
| 403 | #define PCI_DEVICE_ID_INTEL_82Q35 0x29B4 /* 82Q35 Express */ |
| 404 | #define PCI_DEVICE_ID_INTEL_82G33 0x29C4 /* 82G33/G31/P35/P31 Express */ |
| 405 | #define PCI_DEVICE_ID_INTEL_82Q33 0x29D4 /* 82Q33 Express */ |
| 406 | #define PCI_DEVICE_ID_INTEL_82X38 0x29E4 /* 82X38/X48 Express */ |
| 407 | #define PCI_DEVICE_ID_INTEL_3200 0x29F4 /* 3200/3210 Server */ |
| 408 | #define PCI_DEVICE_ID_INTEL_PM965 0x2A04 /* Mobile PM965/GM965 */ |
| 409 | #define PCI_DEVICE_ID_INTEL_GME965 0x2A14 /* Mobile GME965/GLE960 */ |
| 410 | #define PCI_DEVICE_ID_INTEL_CANTIGA_1 0x2A44 /* Cantiga */ |
| 411 | #define PCI_DEVICE_ID_INTEL_CANTIGA_2 0x2a50 /* Cantiga */ |
| 412 | #define PCI_DEVICE_ID_INTEL_CANTIGA_3 0x2A54 /* Cantiga */ |
| 413 | #define PCI_DEVICE_ID_INTEL_CANTIGA_4 0x2A64 /* Cantiga */ |
| 414 | #define PCI_DEVICE_ID_INTEL_CANTIGA_5 0x2A74 /* Cantiga */ |
| 415 | #define PCI_DEVICE_ID_INTEL_EAGLELAKE_1 0x2E04 /* Eaglelake */ |
| 416 | #define PCI_DEVICE_ID_INTEL_EAGLELAKE_2 0x2E14 /* Eaglelake */ |
| 417 | #define PCI_DEVICE_ID_INTEL_EAGLELAKE_3 0x2E24 /* Eaglelake */ |
| 418 | #define PCI_DEVICE_ID_INTEL_EAGLELAKE_4 0x2E34 /* Eaglelake */ |
| 419 | #define PCI_DEVICE_ID_INTEL_CALPELLA_1 0x3B64 /* Calpella */ |
| 420 | #define PCI_DEVICE_ID_INTEL_CALPELLA_2 0x3B65 /* Calpella */ |
| 421 | #define PCI_DEVICE_ID_INTEL_LYNXPOINT_1 0x8C3A /* Lynx Point H */ |
| 422 | #define PCI_DEVICE_ID_INTEL_LYNXPOINT_2 0x8CBA /* Lynx Point H Refresh */ |
| 423 | #define PCI_DEVICE_ID_INTEL_LYNXPOINT_3 0x8D3A /* Lynx Point - Wellsburg */ |
| 424 | #define PCI_DEVICE_ID_INTEL_LYNXPOINT_4 0x9C3A /* Lynx Point LP */ |
| 425 | #define PCI_DEVICE_ID_INTEL_WILDCAT_1 0x9CBA /* Wildcat Point LP */ |
| 426 | #define PCI_DEVICE_ID_INTEL_WILDCAT_2 0x9CBB /* Wildcat Point LP 2 */ |
Youness Alaoui | 5b8f2c7 | 2017-09-29 17:02:05 -0400 | [diff] [blame] | 427 | #define PCI_DEVICE_ID_INTEL_SUNRISE_LP 0x9d3a /* SUNRISE Point-LP */ |
Matt DeVillier | 3380faa | 2020-06-09 13:00:08 -0500 | [diff] [blame] | 428 | #define PCI_DEVICE_ID_INTEL_CANNONPOINT_LP 0x9de0 /* Cannon Point-LP */ |
Matt DeVillier | f81944f | 2020-10-01 15:31:46 -0500 | [diff] [blame] | 429 | #define PCI_DEVICE_ID_INTEL_COMETPOINT_LP 0x02e0 /* Comet Point-LP (Cometlake-U) */ |
Damien Zammit | f4491e7 | 2019-02-23 14:01:00 +1100 | [diff] [blame] | 430 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H1_ME 0xa13a /* SUNRISE Point-H 1 */ |
| 431 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H2_ME 0xa13b /* SUNRISE Point-H 2 */ |
| 432 | #define PCI_DEVICE_ID_INTEL_SUNRISE_H3_ME 0xA13E /* SUNRISE Point-H 3 */ |
| 433 | #define PCI_DEVICE_ID_INTEL_LEWISBURG_CSME1 0xA1BA /* CSME Lewisburg #1 */ |
| 434 | #define PCI_DEVICE_ID_INTEL_LEWISBURG_CSME2 0xA1BB /* CSME Lewisburg #2 */ |
| 435 | #define PCI_DEVICE_ID_INTEL_LEWISBURG_CSME3 0xA1BE /* CSME Lewisburg #3 */ |
| 436 | #define PCI_DEVICE_ID_INTEL_LEWISBURG_IE1 0xA1F8 /* IE Lewisburg #1 */ |
| 437 | #define PCI_DEVICE_ID_INTEL_LEWISBURG_IE2 0xA1F9 /* IE Lewisburg #2 */ |
| 438 | #define PCI_DEVICE_ID_INTEL_LEWISBURG_IE3 0xA1FC /* IE Lewisburg #3 */ |
Robin Broda | 21f9b3e | 2019-04-11 21:14:15 +0200 | [diff] [blame] | 439 | #define PCI_DEVICE_ID_INTEL_CANNONLAKE 0xA360 /* Cannon Lake */ |
Philipp Deppenwiese | d8fe443 | 2016-03-18 00:52:54 +0100 | [diff] [blame] | 440 | |
| 441 | #define PCI_DEV_HAS_SUPPORTED_ME(x) ( \ |
Patrick Rudolph | 5e9dc37 | 2017-11-19 09:11:58 +0100 | [diff] [blame] | 442 | ((x) == PCI_DEVICE_ID_INTEL_COUGARPOINT_1) || \ |
| 443 | ((x) == PCI_DEVICE_ID_INTEL_PATSBURG_1) || \ |
| 444 | ((x) == PCI_DEVICE_ID_INTEL_PANTHERPOINT_1) || \ |
| 445 | ((x) == PCI_DEVICE_ID_INTEL_PANTHERPOINT_2) || \ |
| 446 | ((x) == PCI_DEVICE_ID_INTEL_PANTHERPOINT_3) || \ |
| 447 | ((x) == PCI_DEVICE_ID_INTEL_CAVECREEK) || \ |
| 448 | ((x) == PCI_DEVICE_ID_INTEL_BEARLAKE_1) || \ |
| 449 | ((x) == PCI_DEVICE_ID_INTEL_BEARLAKE_2) || \ |
| 450 | ((x) == PCI_DEVICE_ID_INTEL_BEARLAKE_3) || \ |
| 451 | ((x) == PCI_DEVICE_ID_INTEL_BEARLAKE_4) || \ |
| 452 | ((x) == PCI_DEVICE_ID_INTEL_BEARLAKE_5) || \ |
| 453 | ((x) == PCI_DEVICE_ID_INTEL_82946GZ) || \ |
| 454 | ((x) == PCI_DEVICE_ID_INTEL_82G35) || \ |
| 455 | ((x) == PCI_DEVICE_ID_INTEL_82Q963) || \ |
| 456 | ((x) == PCI_DEVICE_ID_INTEL_82P965) || \ |
| 457 | ((x) == PCI_DEVICE_ID_INTEL_82Q35) || \ |
| 458 | ((x) == PCI_DEVICE_ID_INTEL_82G33) || \ |
| 459 | ((x) == PCI_DEVICE_ID_INTEL_82Q33) || \ |
| 460 | ((x) == PCI_DEVICE_ID_INTEL_82X38) || \ |
| 461 | ((x) == PCI_DEVICE_ID_INTEL_3200) || \ |
| 462 | ((x) == PCI_DEVICE_ID_INTEL_PM965) || \ |
| 463 | ((x) == PCI_DEVICE_ID_INTEL_GME965) || \ |
| 464 | ((x) == PCI_DEVICE_ID_INTEL_CANTIGA_1) || \ |
| 465 | ((x) == PCI_DEVICE_ID_INTEL_CANTIGA_2) || \ |
| 466 | ((x) == PCI_DEVICE_ID_INTEL_CANTIGA_3) || \ |
| 467 | ((x) == PCI_DEVICE_ID_INTEL_CANTIGA_4) || \ |
| 468 | ((x) == PCI_DEVICE_ID_INTEL_CANTIGA_5) || \ |
| 469 | ((x) == PCI_DEVICE_ID_INTEL_EAGLELAKE_1) || \ |
| 470 | ((x) == PCI_DEVICE_ID_INTEL_EAGLELAKE_2) || \ |
| 471 | ((x) == PCI_DEVICE_ID_INTEL_EAGLELAKE_3) || \ |
| 472 | ((x) == PCI_DEVICE_ID_INTEL_EAGLELAKE_4) || \ |
| 473 | ((x) == PCI_DEVICE_ID_INTEL_CALPELLA_1) || \ |
| 474 | ((x) == PCI_DEVICE_ID_INTEL_CALPELLA_2) || \ |
| 475 | ((x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_1) || \ |
| 476 | ((x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_2) || \ |
| 477 | ((x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_3) || \ |
| 478 | ((x) == PCI_DEVICE_ID_INTEL_LYNXPOINT_4) || \ |
| 479 | ((x) == PCI_DEVICE_ID_INTEL_WILDCAT_1) || \ |
| 480 | ((x) == PCI_DEVICE_ID_INTEL_WILDCAT_2) || \ |
Damien Zammit | f4491e7 | 2019-02-23 14:01:00 +1100 | [diff] [blame] | 481 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_LP) || \ |
Matt DeVillier | 3380faa | 2020-06-09 13:00:08 -0500 | [diff] [blame] | 482 | ((x) == PCI_DEVICE_ID_INTEL_CANNONPOINT_LP) || \ |
Matt DeVillier | f81944f | 2020-10-01 15:31:46 -0500 | [diff] [blame] | 483 | ((x) == PCI_DEVICE_ID_INTEL_COMETPOINT_LP) || \ |
Damien Zammit | f4491e7 | 2019-02-23 14:01:00 +1100 | [diff] [blame] | 484 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H1_ME) || \ |
| 485 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H2_ME) || \ |
| 486 | ((x) == PCI_DEVICE_ID_INTEL_SUNRISE_H3_ME) || \ |
| 487 | ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_CSME1) || \ |
| 488 | ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_CSME2) || \ |
| 489 | ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_CSME3) || \ |
| 490 | ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_IE1) || \ |
| 491 | ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_IE2) || \ |
| 492 | ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_IE3) || \ |
Robin Broda | 21f9b3e | 2019-04-11 21:14:15 +0200 | [diff] [blame] | 493 | ((x) == PCI_DEVICE_ID_INTEL_CANNONLAKE) || \ |
Damien Zammit | f4491e7 | 2019-02-23 14:01:00 +1100 | [diff] [blame] | 494 | 0) |