Patrick Georgi | ac95903 | 2020-05-05 22:49:26 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 2 | |
| 3 | #include <types.h> |
Kyösti Mälkki | 1d7541f | 2014-02-17 21:34:42 +0200 | [diff] [blame] | 4 | #include <console/uart.h> |
Kyösti Mälkki | 13f6650 | 2019-03-03 08:01:05 +0200 | [diff] [blame] | 5 | #include <device/mmio.h> |
Kyösti Mälkki | bbf6f3d | 2014-03-15 01:32:55 +0200 | [diff] [blame] | 6 | #include <boot/coreboot_tables.h> |
Sam Lewis | ad7b2e2 | 2020-08-03 20:18:29 +1000 | [diff] [blame] | 7 | #include <soc/ti/am335x/uart.h> |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 8 | |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 9 | #define EFR_ENHANCED_EN (1 << 4) |
| 10 | #define FCR_FIFO_EN (1 << 0) |
| 11 | #define MCR_TCR_TLR (1 << 6) |
| 12 | #define SYSC_SOFTRESET (1 << 1) |
| 13 | #define SYSS_RESETDONE (1 << 0) |
| 14 | |
| 15 | #define LSR_RXFIFOE (1 << 0) |
| 16 | #define LSR_TXFIFOE (1 << 5) |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 17 | |
| 18 | /* |
Kyösti Mälkki | 2cbcd2b | 2014-02-19 08:58:12 +0200 | [diff] [blame] | 19 | * Initialise the serial port with the given baudrate divisor. The settings |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 20 | * are always 8 data bits, no parity, 1 stop bit, no start bits. |
| 21 | */ |
Kyösti Mälkki | c2610a4 | 2014-02-24 20:51:30 +0200 | [diff] [blame] | 22 | static void am335x_uart_init(struct am335x_uart *uart, uint16_t div) |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 23 | { |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 24 | uint16_t lcr_orig, efr_orig, mcr_orig; |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 25 | |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 26 | /* reset the UART */ |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 27 | write16(&uart->sysc, uart->sysc | SYSC_SOFTRESET); |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 28 | while (!(read16(&uart->syss) & SYSS_RESETDONE)) |
| 29 | ; |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 30 | |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 31 | /* 1. switch to register config mode B */ |
| 32 | lcr_orig = read16(&uart->lcr); |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 33 | write16(&uart->lcr, 0xbf); |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 34 | |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 35 | /* |
| 36 | * 2. Set EFR ENHANCED_EN bit. To access this bit, registers must |
| 37 | * be in TCR_TLR submode, meaning EFR[4] = 1 and MCR[6] = 1. |
| 38 | */ |
| 39 | efr_orig = read16(&uart->efr); |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 40 | write16(&uart->efr, efr_orig | EFR_ENHANCED_EN); |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 41 | |
| 42 | /* 3. Switch to register config mode A */ |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 43 | write16(&uart->lcr, 0x80); |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 44 | |
| 45 | /* 4. Enable register submode TCR_TLR to access the UARTi.UART_TLR */ |
| 46 | mcr_orig = read16(&uart->mcr); |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 47 | write16(&uart->mcr, mcr_orig | MCR_TCR_TLR); |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 48 | |
| 49 | /* 5. Enable the FIFO. For now we'll ignore FIFO triggers and DMA */ |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 50 | write16(&uart->fcr, FCR_FIFO_EN); |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 51 | |
| 52 | /* 6. Switch to configuration mode B */ |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 53 | write16(&uart->lcr, 0xbf); |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 54 | /* Skip steps 7 and 8 (setting up FIFO triggers for DMA) */ |
| 55 | |
| 56 | /* 9. Restore original EFR value */ |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 57 | write16(&uart->efr, efr_orig); |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 58 | |
| 59 | /* 10. Switch to config mode A */ |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 60 | write16(&uart->lcr, 0x80); |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 61 | |
| 62 | /* 11. Restore original MCR value */ |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 63 | write16(&uart->mcr, mcr_orig); |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 64 | |
| 65 | /* 12. Restore original LCR value */ |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 66 | write16(&uart->lcr, lcr_orig); |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 67 | |
| 68 | /* Protocol, baud rate and interrupt settings */ |
| 69 | |
| 70 | /* 1. Disable UART access to DLL and DLH registers */ |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 71 | write16(&uart->mdr1, read16(&uart->mdr1) | 0x7); |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 72 | |
| 73 | /* 2. Switch to config mode B */ |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 74 | write16(&uart->lcr, 0xbf); |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 75 | |
| 76 | /* 3. Enable access to IER[7:4] */ |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 77 | write16(&uart->efr, efr_orig | EFR_ENHANCED_EN); |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 78 | |
| 79 | /* 4. Switch to operational mode */ |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 80 | write16(&uart->lcr, 0x0); |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 81 | |
| 82 | /* 5. Clear IER */ |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 83 | write16(&uart->ier, 0x0); |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 84 | |
| 85 | /* 6. Switch to config mode B */ |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 86 | write16(&uart->lcr, 0xbf); |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 87 | |
| 88 | /* 7. Set dll and dlh to the desired values (table 19-25) */ |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 89 | write16(&uart->dlh, (div >> 8)); |
| 90 | write16(&uart->dll, (div & 0xff)); |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 91 | |
| 92 | /* 8. Switch to operational mode to access ier */ |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 93 | write16(&uart->lcr, 0x0); |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 94 | |
| 95 | /* 9. Clear ier to disable all interrupts */ |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 96 | write16(&uart->ier, 0x0); |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 97 | |
| 98 | /* 10. Switch to config mode B */ |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 99 | write16(&uart->lcr, 0xbf); |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 100 | |
| 101 | /* 11. Restore efr */ |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 102 | write16(&uart->efr, efr_orig); |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 103 | |
| 104 | /* 12. Set protocol formatting 8n1 (8 bit data, no parity, 1 stop bit) */ |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 105 | write16(&uart->lcr, 0x3); |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 106 | |
| 107 | /* 13. Load the new UART mode */ |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 108 | write16(&uart->mdr1, 0x0); |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 109 | } |
| 110 | |
| 111 | /* |
| 112 | * Read a single byte from the serial port. Returns 1 on success, 0 |
Martin Roth | 4c3ab73 | 2013-07-08 16:23:54 -0600 | [diff] [blame] | 113 | * otherwise. When the function is successful, the character read is |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 114 | * written into its argument c. |
| 115 | */ |
Kyösti Mälkki | c2610a4 | 2014-02-24 20:51:30 +0200 | [diff] [blame] | 116 | static unsigned char am335x_uart_rx_byte(struct am335x_uart *uart) |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 117 | { |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 118 | while (!(read16(&uart->lsr) & LSR_RXFIFOE)); |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 119 | |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 120 | return read8(&uart->rhr); |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 121 | } |
| 122 | |
| 123 | /* |
| 124 | * Output a single byte to the serial port. |
| 125 | */ |
Kyösti Mälkki | c2610a4 | 2014-02-24 20:51:30 +0200 | [diff] [blame] | 126 | static void am335x_uart_tx_byte(struct am335x_uart *uart, unsigned char data) |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 127 | { |
Gabe Black | 8cfa33e | 2013-06-11 21:58:18 -0400 | [diff] [blame] | 128 | while (!(read16(&uart->lsr) & LSR_TXFIFOE)); |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 129 | |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 130 | return write8(&uart->thr, data); |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 131 | } |
| 132 | |
Kyösti Mälkki | 2cbcd2b | 2014-02-19 08:58:12 +0200 | [diff] [blame] | 133 | unsigned int uart_platform_refclk(void) |
| 134 | { |
| 135 | return 48000000; |
| 136 | } |
| 137 | |
Felix Held | e3a1247 | 2020-09-11 15:47:09 +0200 | [diff] [blame] | 138 | uintptr_t uart_platform_base(unsigned int idx) |
Kyösti Mälkki | c2610a4 | 2014-02-24 20:51:30 +0200 | [diff] [blame] | 139 | { |
Kyösti Mälkki | 70342a7 | 2014-03-14 22:28:29 +0200 | [diff] [blame] | 140 | const unsigned int bases[] = { |
| 141 | 0x44e09000, 0x48022000, 0x48024000, |
| 142 | 0x481a6000, 0x481a8000, 0x481aa000 |
| 143 | }; |
| 144 | if (idx < ARRAY_SIZE(bases)) |
| 145 | return bases[idx]; |
| 146 | return 0; |
Kyösti Mälkki | c2610a4 | 2014-02-24 20:51:30 +0200 | [diff] [blame] | 147 | } |
| 148 | |
Felix Held | e3a1247 | 2020-09-11 15:47:09 +0200 | [diff] [blame] | 149 | void uart_init(unsigned int idx) |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 150 | { |
Kyösti Mälkki | 70342a7 | 2014-03-14 22:28:29 +0200 | [diff] [blame] | 151 | struct am335x_uart *uart = uart_platform_baseptr(idx); |
Kyösti Mälkki | 0567c91 | 2014-02-14 10:31:38 +0200 | [diff] [blame] | 152 | uint16_t div = (uint16_t) uart_baudrate_divisor( |
Julien Viard de Galbert | 235daa4 | 2018-02-20 11:45:48 +0100 | [diff] [blame] | 153 | get_uart_baudrate(), uart_platform_refclk(), 16); |
Kyösti Mälkki | c2610a4 | 2014-02-24 20:51:30 +0200 | [diff] [blame] | 154 | am335x_uart_init(uart, div); |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 155 | } |
| 156 | |
Felix Held | e3a1247 | 2020-09-11 15:47:09 +0200 | [diff] [blame] | 157 | unsigned char uart_rx_byte(unsigned int idx) |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 158 | { |
Kyösti Mälkki | 70342a7 | 2014-03-14 22:28:29 +0200 | [diff] [blame] | 159 | struct am335x_uart *uart = uart_platform_baseptr(idx); |
Kyösti Mälkki | c2610a4 | 2014-02-24 20:51:30 +0200 | [diff] [blame] | 160 | return am335x_uart_rx_byte(uart); |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 161 | } |
| 162 | |
Felix Held | e3a1247 | 2020-09-11 15:47:09 +0200 | [diff] [blame] | 163 | void uart_tx_byte(unsigned int idx, unsigned char data) |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 164 | { |
Kyösti Mälkki | 70342a7 | 2014-03-14 22:28:29 +0200 | [diff] [blame] | 165 | struct am335x_uart *uart = uart_platform_baseptr(idx); |
Kyösti Mälkki | c2610a4 | 2014-02-24 20:51:30 +0200 | [diff] [blame] | 166 | am335x_uart_tx_byte(uart, data); |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 167 | } |
| 168 | |
Felix Held | e3a1247 | 2020-09-11 15:47:09 +0200 | [diff] [blame] | 169 | void uart_tx_flush(unsigned int idx) |
Kyösti Mälkki | 0567c91 | 2014-02-14 10:31:38 +0200 | [diff] [blame] | 170 | { |
Gabe Black | 3c7e939 | 2013-05-26 07:15:57 -0700 | [diff] [blame] | 171 | } |
Kyösti Mälkki | bbf6f3d | 2014-03-15 01:32:55 +0200 | [diff] [blame] | 172 | |
Kyösti Mälkki | bbf6f3d | 2014-03-15 01:32:55 +0200 | [diff] [blame] | 173 | void uart_fill_lb(void *data) |
| 174 | { |
| 175 | struct lb_serial serial; |
| 176 | serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED; |
Kyösti Mälkki | 70342a7 | 2014-03-14 22:28:29 +0200 | [diff] [blame] | 177 | serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE); |
Julien Viard de Galbert | 235daa4 | 2018-02-20 11:45:48 +0100 | [diff] [blame] | 178 | serial.baud = get_uart_baudrate(); |
Vadim Bendebury | 9dccf1c | 2015-01-09 16:54:19 -0800 | [diff] [blame] | 179 | serial.regwidth = 2; |
Jacob Garber | 7839827 | 2019-07-24 11:12:09 -0600 | [diff] [blame] | 180 | serial.input_hertz = uart_platform_refclk(); |
| 181 | serial.uart_pci_addr = CONFIG_UART_PCI_ADDR; |
Kyösti Mälkki | bbf6f3d | 2014-03-15 01:32:55 +0200 | [diff] [blame] | 182 | lb_add_serial(&serial, data); |
| 183 | |
| 184 | lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); |
| 185 | } |