Angel Pons | 1ddb894 | 2020-04-04 18:51:26 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Julius Werner | ce011ec | 2013-08-06 16:00:37 -0700 | [diff] [blame] | 2 | |
Aaron Durbin | c6588c5 | 2015-05-15 13:15:34 -0500 | [diff] [blame] | 3 | #include <boot_device.h> |
Julius Werner | 1ed0c8c | 2014-10-20 13:16:29 -0700 | [diff] [blame] | 4 | #include <console/console.h> |
| 5 | #include <soc/alternate_cbfs.h> |
| 6 | #include <soc/power.h> |
| 7 | #include <soc/spi.h> |
Julius Werner | ec5e5e0 | 2014-08-20 15:29:56 -0700 | [diff] [blame] | 8 | #include <symbols.h> |
Julius Werner | ce011ec | 2013-08-06 16:00:37 -0700 | [diff] [blame] | 9 | |
| 10 | /* This allows USB A-A firmware upload from a compatible host in four parts: |
Martin Roth | e18e642 | 2017-06-03 20:03:18 -0600 | [diff] [blame] | 11 | * The first two are the bare BL1 and the coreboot boot block, which are just |
Julius Werner | ce011ec | 2013-08-06 16:00:37 -0700 | [diff] [blame] | 12 | * written to their respective loading addresses. These transfers are initiated |
| 13 | * by the IROM / BL1, so this code has nothing to do with them. |
| 14 | * |
| 15 | * The third transfer is a valid CBFS image that contains only the romstage, |
Julius Werner | ec5e5e0 | 2014-08-20 15:29:56 -0700 | [diff] [blame] | 16 | * and must be small enough to fit into the PRE_RAM CBFS cache in |
Julius Werner | ce011ec | 2013-08-06 16:00:37 -0700 | [diff] [blame] | 17 | * IRAM. It is loaded when this function gets called in the boot block, and |
| 18 | * the normal CBFS code extracts the romstage from it. |
| 19 | * |
| 20 | * The fourth transfer is also a CBFS image, but can be of arbitrary size and |
| 21 | * should contain all available stages/payloads/etc. It is loaded when this |
| 22 | * function is called a second time at the end of the romstage, and copied to |
Julius Werner | ec5e5e0 | 2014-08-20 15:29:56 -0700 | [diff] [blame] | 23 | * the romstage/ramstage CBFS cache in DRAM. It will reside there for the |
Kyösti Mälkki | 16248e8 | 2019-08-18 14:56:21 +0300 | [diff] [blame] | 24 | * rest of the firmware's lifetime and all subsequent stages can just directly |
| 25 | * reference it there. |
Julius Werner | ce011ec | 2013-08-06 16:00:37 -0700 | [diff] [blame] | 26 | */ |
Aaron Durbin | c6588c5 | 2015-05-15 13:15:34 -0500 | [diff] [blame] | 27 | static int usb_cbfs_open(void) |
Julius Werner | 45d2ff3 | 2013-08-12 18:04:06 -0700 | [diff] [blame] | 28 | { |
Kyösti Mälkki | 16248e8 | 2019-08-18 14:56:21 +0300 | [diff] [blame] | 29 | if (!ENV_ROMSTAGE_OR_BEFORE) |
| 30 | return 0; |
| 31 | |
Julius Werner | ce011ec | 2013-08-06 16:00:37 -0700 | [diff] [blame] | 32 | static int first_run = 1; |
| 33 | int (*irom_load_usb)(void) = *irom_load_image_from_usb_ptr; |
| 34 | |
| 35 | if (!first_run) |
| 36 | return 0; |
| 37 | |
| 38 | if (!irom_load_usb()) { |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 39 | printk(BIOS_EMERG, "Unable to load CBFS image via USB!\n"); |
Julius Werner | ce011ec | 2013-08-06 16:00:37 -0700 | [diff] [blame] | 40 | return -1; |
| 41 | } |
| 42 | |
| 43 | /* |
| 44 | * We need to trust the host/irom to copy the image to our |
Julius Werner | ec5e5e0 | 2014-08-20 15:29:56 -0700 | [diff] [blame] | 45 | * _cbfs_cache address... there is no way to control or even |
Julius Werner | ce011ec | 2013-08-06 16:00:37 -0700 | [diff] [blame] | 46 | * check the transfer size or target address from our side. |
| 47 | */ |
| 48 | |
| 49 | printk(BIOS_DEBUG, "USB A-A transfer successful, CBFS image should now" |
Julius Werner | ec5e5e0 | 2014-08-20 15:29:56 -0700 | [diff] [blame] | 50 | " be at %p\n", _cbfs_cache); |
Julius Werner | ce011ec | 2013-08-06 16:00:37 -0700 | [diff] [blame] | 51 | first_run = 0; |
Julius Werner | ce011ec | 2013-08-06 16:00:37 -0700 | [diff] [blame] | 52 | return 0; |
| 53 | } |
| 54 | |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 55 | /* |
| 56 | * SDMMC works very similar to USB A-A: we copy the CBFS image into memory |
| 57 | * and read it from there. While SDMMC would also allow direct block by block |
| 58 | * on-demand reading, we might run into problems if we call back into the IROM |
| 59 | * in very late boot stages (e.g. after initializing/changing MMC clocks)... so |
| 60 | * this seems like a safer approach. It also makes it easy to pass our image |
| 61 | * down to payloads. |
| 62 | */ |
Aaron Durbin | c6588c5 | 2015-05-15 13:15:34 -0500 | [diff] [blame] | 63 | static int sdmmc_cbfs_open(void) |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 64 | { |
Kyösti Mälkki | 16248e8 | 2019-08-18 14:56:21 +0300 | [diff] [blame] | 65 | if (!ENV_ROMSTAGE_OR_BEFORE) |
| 66 | return 0; |
| 67 | |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 68 | /* |
| 69 | * In the bootblock, we just copy the small part that fits in the buffer |
| 70 | * and hope that it's enough (since the romstage is currently always the |
| 71 | * first component in the image, this should work out). In the romstage, |
Julius Werner | ec5e5e0 | 2014-08-20 15:29:56 -0700 | [diff] [blame] | 72 | * we copy until our cache is full (currently 12M) to avoid the pain of |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 73 | * figuring out the true image size from in here. Since this is mainly a |
| 74 | * developer/debug boot mode, those shortcomings should be bearable. |
| 75 | */ |
Julius Werner | 7e0dea6 | 2019-02-20 18:39:22 -0800 | [diff] [blame] | 76 | const u32 count = REGION_SIZE(cbfs_cache) / 512; |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 77 | static int first_run = 1; |
| 78 | int (*irom_load_sdmmc)(u32 start, u32 count, void *dst) = |
| 79 | *irom_sdmmc_read_blocks_ptr; |
| 80 | |
| 81 | if (!first_run) |
| 82 | return 0; |
| 83 | |
Julius Werner | ec5e5e0 | 2014-08-20 15:29:56 -0700 | [diff] [blame] | 84 | if (!irom_load_sdmmc(1, count, _cbfs_cache)) { |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 85 | printk(BIOS_EMERG, "Unable to load CBFS image from SDMMC!\n"); |
| 86 | return -1; |
| 87 | } |
| 88 | |
| 89 | printk(BIOS_DEBUG, "SDMMC read successful, CBFS image should now be" |
Julius Werner | ec5e5e0 | 2014-08-20 15:29:56 -0700 | [diff] [blame] | 90 | " at %p\n", _cbfs_cache); |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 91 | first_run = 0; |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 92 | return 0; |
| 93 | } |
| 94 | |
Julius Werner | c893197 | 2021-04-16 16:48:32 -0700 | [diff] [blame] | 95 | const static struct mem_region_device alternate_rdev = |
| 96 | MEM_REGION_DEV_RO_INIT(_cbfs_cache, REGION_SIZE(cbfs_cache)); |
Aaron Durbin | c6588c5 | 2015-05-15 13:15:34 -0500 | [diff] [blame] | 97 | |
| 98 | const struct region_device *boot_device_ro(void) |
| 99 | { |
Julius Werner | ce011ec | 2013-08-06 16:00:37 -0700 | [diff] [blame] | 100 | if (*iram_secondary_base == SECONDARY_BASE_BOOT_USB) |
Aaron Durbin | c6588c5 | 2015-05-15 13:15:34 -0500 | [diff] [blame] | 101 | return &alternate_rdev.rdev; |
Julius Werner | ce011ec | 2013-08-06 16:00:37 -0700 | [diff] [blame] | 102 | |
Julius Werner | fa938c7 | 2013-08-29 14:17:36 -0700 | [diff] [blame] | 103 | switch (exynos_power->om_stat & OM_STAT_MASK) { |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 104 | case OM_STAT_SDMMC: |
Aaron Durbin | c6588c5 | 2015-05-15 13:15:34 -0500 | [diff] [blame] | 105 | return &alternate_rdev.rdev; |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 106 | case OM_STAT_SPI: |
Aaron Durbin | c6588c5 | 2015-05-15 13:15:34 -0500 | [diff] [blame] | 107 | return exynos_spi_boot_device(); |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 108 | default: |
| 109 | printk(BIOS_EMERG, "Exynos OM_STAT value 0x%x not supported!\n", |
Julius Werner | fa938c7 | 2013-08-29 14:17:36 -0700 | [diff] [blame] | 110 | exynos_power->om_stat); |
Aaron Durbin | c6588c5 | 2015-05-15 13:15:34 -0500 | [diff] [blame] | 111 | return NULL; |
| 112 | } |
| 113 | } |
| 114 | |
| 115 | void boot_device_init(void) |
| 116 | { |
Aaron Durbin | c6588c5 | 2015-05-15 13:15:34 -0500 | [diff] [blame] | 117 | if (*iram_secondary_base == SECONDARY_BASE_BOOT_USB) { |
| 118 | printk(BIOS_DEBUG, "Using Exynos alternate boot mode USB A-A\n"); |
| 119 | usb_cbfs_open(); |
| 120 | return; |
| 121 | } |
| 122 | |
| 123 | switch (exynos_power->om_stat & OM_STAT_MASK) { |
| 124 | case OM_STAT_SDMMC: |
| 125 | printk(BIOS_DEBUG, "Using Exynos alternate boot mode SDMMC\n"); |
| 126 | sdmmc_cbfs_open(); |
| 127 | break; |
| 128 | case OM_STAT_SPI: |
| 129 | exynos_init_spi_boot_device(); |
| 130 | break; |
| 131 | default: |
| 132 | printk(BIOS_EMERG, "Exynos OM_STAT value 0x%x not supported!\n", |
| 133 | exynos_power->om_stat); |
Julius Werner | ad4556f2 | 2013-08-21 17:33:31 -0700 | [diff] [blame] | 134 | } |
Julius Werner | ce011ec | 2013-08-06 16:00:37 -0700 | [diff] [blame] | 135 | } |