Wenbin Mei | 1cbcfc13 | 2021-11-05 10:05:11 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| 3 | /* |
| 4 | * This file is created based on MT8186 Functional Specification |
| 5 | * Chapter number: 5.7 |
| 6 | */ |
| 7 | |
| 8 | #include <device/mmio.h> |
| 9 | #include <soc/addressmap.h> |
| 10 | #include <soc/gpio.h> |
| 11 | #include <soc/regulator.h> |
| 12 | #include <soc/msdc.h> |
| 13 | |
| 14 | DEFINE_BITFIELD(MSDC0_DRV, 29, 0) |
| 15 | DEFINE_BITFIELD(MSDC1_DRV, 23, 6) |
| 16 | DEFINE_BITFIELD(MSDC1_GPIO_MODE0_0, 18, 16) |
| 17 | DEFINE_BITFIELD(MSDC1_GPIO_MODE0_1, 22, 20) |
| 18 | DEFINE_BITFIELD(MSDC1_GPIO_MODE0_2, 26, 24) |
| 19 | DEFINE_BITFIELD(MSDC1_GPIO_MODE0_3, 30, 28) |
| 20 | DEFINE_BITFIELD(MSDC1_GPIO_MODE1_0, 2, 0) |
| 21 | DEFINE_BITFIELD(MSDC1_GPIO_MODE1_1, 6, 4) |
| 22 | |
| 23 | #define MSDC0_BASE 0x11230000 |
| 24 | #define MSDC0_TOP_BASE 0x11cd0000 |
| 25 | |
| 26 | #define MSDC0_DRV_VALUE 0x1b6db6db |
| 27 | #define MSDC1_DRV_VALUE 0x1b6db |
| 28 | #define MSDC1_GPIO_MODE0_VALUE 0x1 |
| 29 | #define MSDC1_GPIO_MODE1_VALUE 0x1 |
| 30 | |
| 31 | enum { |
| 32 | MSDC1_GPIO_MODE0_BASE = 0x100053a0, |
| 33 | MSDC1_GPIO_MODE1_BASE = 0x100053b0, |
| 34 | }; |
| 35 | |
Rex-BC Chen | 4ab77ad | 2021-10-26 13:17:43 +0800 | [diff] [blame] | 36 | void mtk_msdc_configure_emmc(bool is_early_init) |
Wenbin Mei | 1cbcfc13 | 2021-11-05 10:05:11 +0800 | [diff] [blame] | 37 | { |
| 38 | void *gpio_base = (void *)IOCFG_LT_BASE; |
| 39 | int i; |
| 40 | |
| 41 | const gpio_t emmc_pu_pin[] = { |
| 42 | GPIO(MSDC0_DAT0), GPIO(MSDC0_DAT1), |
| 43 | GPIO(MSDC0_DAT2), GPIO(MSDC0_DAT3), |
| 44 | GPIO(MSDC0_DAT4), GPIO(MSDC0_DAT5), |
| 45 | GPIO(MSDC0_DAT6), GPIO(MSDC0_DAT7), |
| 46 | GPIO(MSDC0_CMD), GPIO(MSDC0_RSTB), |
| 47 | }; |
| 48 | |
| 49 | const gpio_t emmc_pd_pin[] = { |
| 50 | GPIO(MSDC0_DSL), GPIO(MSDC0_CLK), |
| 51 | }; |
| 52 | |
| 53 | for (i = 0; i < ARRAY_SIZE(emmc_pu_pin); i++) |
| 54 | gpio_set_pull(emmc_pu_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_UP); |
| 55 | |
| 56 | for (i = 0; i < ARRAY_SIZE(emmc_pd_pin); i++) |
| 57 | gpio_set_pull(emmc_pd_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_DOWN); |
| 58 | |
| 59 | /* set eMMC cmd/dat/clk pins driving to 8mA */ |
| 60 | SET32_BITFIELDS(gpio_base, MSDC0_DRV, MSDC0_DRV_VALUE); |
Rex-BC Chen | 4ab77ad | 2021-10-26 13:17:43 +0800 | [diff] [blame] | 61 | |
| 62 | if (is_early_init) |
| 63 | mtk_emmc_early_init((void *)MSDC0_BASE, (void *)MSDC0_TOP_BASE); |
Wenbin Mei | 1cbcfc13 | 2021-11-05 10:05:11 +0800 | [diff] [blame] | 64 | } |
| 65 | |
| 66 | void mtk_msdc_configure_sdcard(void) |
| 67 | { |
| 68 | void *gpio_base = (void *)IOCFG_LB_BASE; |
| 69 | void *gpio_mode0_base = (void *)MSDC1_GPIO_MODE0_BASE; |
| 70 | void *gpio_mode1_base = (void *)MSDC1_GPIO_MODE1_BASE; |
| 71 | int i; |
| 72 | |
| 73 | const gpio_t sdcard_pu_pin[] = { |
| 74 | GPIO(MSDC1_DAT0), GPIO(MSDC1_DAT1), |
| 75 | GPIO(MSDC1_DAT2), GPIO(MSDC1_DAT3), |
| 76 | GPIO(MSDC1_CMD), |
| 77 | }; |
| 78 | |
| 79 | const gpio_t sdcard_pd_pin[] = { |
| 80 | GPIO(MSDC1_CLK), |
| 81 | }; |
| 82 | |
| 83 | for (i = 0; i < ARRAY_SIZE(sdcard_pu_pin); i++) |
| 84 | gpio_set_pull(sdcard_pu_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_UP); |
| 85 | |
| 86 | for (i = 0; i < ARRAY_SIZE(sdcard_pd_pin); i++) |
| 87 | gpio_set_pull(sdcard_pd_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_DOWN); |
| 88 | |
| 89 | /* set sdcard cmd/dat/clk pins driving to 8mA */ |
| 90 | SET32_BITFIELDS(gpio_base, MSDC1_DRV, MSDC1_DRV_VALUE); |
| 91 | |
| 92 | /* set sdcard dat2/dat0/dat3/cmd/clk pins to msdc1 mode */ |
| 93 | SET32_BITFIELDS(gpio_mode0_base, |
| 94 | MSDC1_GPIO_MODE0_0, MSDC1_GPIO_MODE0_VALUE, |
| 95 | MSDC1_GPIO_MODE0_1, MSDC1_GPIO_MODE0_VALUE, |
| 96 | MSDC1_GPIO_MODE0_2, MSDC1_GPIO_MODE0_VALUE, |
| 97 | MSDC1_GPIO_MODE0_3, MSDC1_GPIO_MODE0_VALUE); |
| 98 | |
| 99 | /* set sdcard dat1 pin to msdc1 mode */ |
| 100 | SET32_BITFIELDS(gpio_mode1_base, |
| 101 | MSDC1_GPIO_MODE1_0, MSDC1_GPIO_MODE1_VALUE, |
| 102 | MSDC1_GPIO_MODE1_1, MSDC1_GPIO_MODE1_VALUE); |
| 103 | |
| 104 | /* enable SDCard power */ |
| 105 | mainboard_set_regulator_vol(MTK_REGULATOR_VMCH, 3300000); |
| 106 | mainboard_set_regulator_vol(MTK_REGULATOR_VMC, 3300000); |
| 107 | } |