| Rocky Phagura | 17a798b | 2020-10-08 13:32:41 -0700 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| Marc Jones | 352ca5b | 2021-03-18 17:01:06 -0600 | [diff] [blame] | 3 | #include <console/console.h> |
| Rocky Phagura | 17a798b | 2020-10-08 13:32:41 -0700 | [diff] [blame] | 4 | #include <cpu/x86/smm.h> |
| Marc Jones | 352ca5b | 2021-03-18 17:01:06 -0600 | [diff] [blame] | 5 | #include <device/pci.h> |
| 6 | #include <intelblocks/smihandler.h> |
| 7 | #include <soc/pci_devs.h> |
| 8 | #include <soc/pm.h> |
| 9 | |
| 10 | /* |
| 11 | * Specific SOC SMI handler during ramstage finalize phase |
| 12 | */ |
| 13 | void smihandler_soc_at_finalize(void) |
| 14 | { |
| 15 | /* SMM_FEATURE_CONTROL can only be written within SMM. */ |
| 16 | printk(BIOS_DEBUG, "Lock SMM_FEATURE_CONTROL\n"); |
| 17 | const pci_devfn_t dev = UBOX_DEV_PMON; |
| 18 | pci_or_config32(dev, SMM_FEATURE_CONTROL, |
| 19 | SMM_CODE_CHK_EN | SMM_FEATURE_CONTROL_LOCK); |
| 20 | |
| 21 | } |
| Rocky Phagura | 17a798b | 2020-10-08 13:32:41 -0700 | [diff] [blame] | 22 | |
| 23 | /* This is needed by common SMM code */ |
| 24 | const smi_handler_t southbridge_smi[SMI_STS_BITS] = { |
| 25 | [APM_STS_BIT] = smihandler_southbridge_apmc, |
| 26 | [PM1_STS_BIT] = smihandler_southbridge_pm1, |
| 27 | #if CONFIG(SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE) |
| 28 | [TCO_STS_BIT] = smihandler_southbridge_tco, |
| 29 | #endif |
| 30 | }; |