blob: 5ea09ac3a7ae5fb77ba5945f1020feb75b0a5f02 [file] [log] [blame]
Patrick Georgiac959032020-05-05 22:49:26 +02001/* SPDX-License-Identifier: GPL-2.0-or-later */
Jonathan Zhang8f895492020-01-16 11:16:45 -08002
3#include <bootblock_common.h>
4#include <device/pci.h>
5#include <FsptUpd.h>
6#include <intelblocks/fast_spi.h>
7#include <soc/iomap.h>
8#include <console/console.h>
Johnny Lin34473ea2020-03-18 10:23:26 +08009#include <cpu/x86/mtrr.h>
Johnny Linebb7f542020-02-19 15:52:45 +080010#include <intelblocks/lpc_lib.h>
Arthur Heymansee55d712021-05-12 16:22:05 +020011#include <security/intel/cbnt/cbnt.h>
Andrey Petrov335384d2020-03-22 22:27:44 -070012#include <soc/pci_devs.h>
Rocky Phagurac62c98a2020-05-23 20:29:00 -070013#include <soc/bootblock.h>
Arthur Heymans087fe9f2020-10-28 14:10:37 +010014#include <fsp/util.h>
Jonathan Zhang8f895492020-01-16 11:16:45 -080015
16const FSPT_UPD temp_ram_init_params = {
17 .FspUpdHeader = {
18 .Signature = FSPT_UPD_SIGNATURE,
19 .Revision = 1,
20 .Reserved = {0},
21 },
22 .FsptCoreUpd = {
23 .MicrocodeRegionBase = (UINT32)CONFIG_CPU_MICROCODE_CBFS_LOC,
24 .MicrocodeRegionLength = (UINT32)CONFIG_CPU_MICROCODE_CBFS_LEN,
Johnny Lin34473ea2020-03-18 10:23:26 +080025 .CodeRegionBase = (UINT32)CACHE_ROM_BASE,
26 .CodeRegionLength = (UINT32)CACHE_ROM_SIZE,
Jonathan Zhang8f895492020-01-16 11:16:45 -080027 .Reserved1 = {0},
28 },
29 .FsptConfig = {
Jonathan Zhang641642e2020-05-26 13:42:28 -070030 .FsptPort80RouteDisable = 0,
Jonathan Zhang8f895492020-01-16 11:16:45 -080031 .ReservedTempRamInitUpd = {0},
32 },
33 .UnusedUpdSpace0 = {0},
34 .UpdTerminator = 0x55AA,
35};
36
Arthur Heymans02dec122020-11-18 12:27:28 +010037static uint64_t assembly_timestamp;
38static uint64_t bootblock_timestamp;
39
Jonathan Zhang8f895492020-01-16 11:16:45 -080040asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
41{
Arthur Heymans02dec122020-11-18 12:27:28 +010042 /*
43 * FSP-T does not respect its own API and trashes registers
44 * coreboot uses to store its initial timestamp.
45 */
46 assembly_timestamp = base_timestamp;
47 bootblock_timestamp = timestamp_get();
Jonathan Zhang8f895492020-01-16 11:16:45 -080048 fast_spi_cache_bios_region();
49
Arthur Heymans02dec122020-11-18 12:27:28 +010050 bootblock_main_with_basetime(MIN(assembly_timestamp, bootblock_timestamp));
Jonathan Zhang8f895492020-01-16 11:16:45 -080051}
52
53void bootblock_soc_early_init(void)
54{
55 fast_spi_early_init(SPI_BASE_ADDRESS);
Johnny Linebb7f542020-02-19 15:52:45 +080056 pch_enable_lpc();
Andrey Petrov335384d2020-03-22 22:27:44 -070057
58 /* Set up P2SB BAR. This is needed for PCR to work */
Nico Huberf4f365f2021-10-14 18:16:39 +020059 uint8_t p2sb_cmd = pci_s_read_config8(PCH_DEV_P2SB, PCI_COMMAND);
60 pci_s_write_config8(PCH_DEV_P2SB, PCI_COMMAND, p2sb_cmd | PCI_COMMAND_MEMORY);
61 pci_s_write_config32(PCH_DEV_P2SB, PCI_BASE_ADDRESS_0, CONFIG_PCR_BASE_ADDRESS);
Jonathan Zhang8f895492020-01-16 11:16:45 -080062}
63
64void bootblock_soc_init(void)
65{
Arthur Heymans02dec122020-11-18 12:27:28 +010066 if (assembly_timestamp > bootblock_timestamp)
67 printk(BIOS_WARNING, "Invalid initial timestamp detected\n");
68
Arthur Heymans087fe9f2020-10-28 14:10:37 +010069 if (CONFIG(FSP_CAR))
70 report_fspt_output();
Arthur Heymansee55d712021-05-12 16:22:05 +020071
72 if (CONFIG(INTEL_CBNT_LOGGING))
73 intel_cbnt_log_registers();
74
Rocky Phagurac62c98a2020-05-23 20:29:00 -070075 bootblock_pch_init();
Jonathan Zhang8f895492020-01-16 11:16:45 -080076}