Arthur Heymans | c8db633 | 2019-06-17 13:32:13 +0200 | [diff] [blame] | 1 | ifeq ($(CONFIG_SOC_INTEL_CANNONLAKE_BASE),y) |
Lijian Zhao | 8109604 | 2017-05-02 18:54:44 -0700 | [diff] [blame] | 2 | |
Lijian Zhao | 0ade313 | 2017-07-07 12:25:20 -0700 | [diff] [blame] | 3 | subdirs-y += romstage |
Lijian Zhao | acfc149 | 2017-07-06 15:27:27 -0700 | [diff] [blame] | 4 | subdirs-y += ../../../cpu/intel/microcode |
Pratik Prajapati | 01eda28 | 2017-08-17 21:09:45 -0700 | [diff] [blame] | 5 | subdirs-y += ../../../cpu/intel/turbo |
Ronak Kanabar | a432f38 | 2019-03-16 21:26:43 +0530 | [diff] [blame] | 6 | subdirs-y += ../../../cpu/intel/common |
Andrey Petrov | 9f244a5 | 2017-06-05 18:24:50 -0700 | [diff] [blame] | 7 | |
Andrey Petrov | 9f244a5 | 2017-06-05 18:24:50 -0700 | [diff] [blame] | 8 | bootblock-y += bootblock/bootblock.c |
Andrey Petrov | 9f244a5 | 2017-06-05 18:24:50 -0700 | [diff] [blame] | 9 | bootblock-y += bootblock/pch.c |
Lijian Zhao | b3dfcb8 | 2017-08-16 22:18:52 -0700 | [diff] [blame] | 10 | bootblock-y += pmutil.c |
Andrey Petrov | 9f244a5 | 2017-06-05 18:24:50 -0700 | [diff] [blame] | 11 | bootblock-y += bootblock/report_platform.c |
Lijian Zhao | 3211117 | 2017-08-16 11:40:03 -0700 | [diff] [blame] | 12 | bootblock-y += gspi.c |
Lijian Zhao | 9bb684a | 2017-10-30 17:03:06 -0700 | [diff] [blame] | 13 | bootblock-y += i2c.c |
Lijian Zhao | 3211117 | 2017-08-16 11:40:03 -0700 | [diff] [blame] | 14 | bootblock-y += spi.c |
Caveh Jalali | 1428f01 | 2018-01-23 22:15:24 -0800 | [diff] [blame] | 15 | bootblock-y += lpc.c |
Subrata Banik | 7837c20 | 2018-05-07 17:13:40 +0530 | [diff] [blame] | 16 | bootblock-y += p2sb.c |
Nico Huber | a96e66a | 2018-11-11 02:51:14 +0100 | [diff] [blame] | 17 | bootblock-y += uart.c |
Andrey Petrov | 9f244a5 | 2017-06-05 18:24:50 -0700 | [diff] [blame] | 18 | |
Subrata Banik | cff6a1d | 2019-01-30 11:35:18 +0530 | [diff] [blame] | 19 | romstage-y += cnl_memcfg_init.c |
Lijian Zhao | 3211117 | 2017-08-16 11:40:03 -0700 | [diff] [blame] | 20 | romstage-y += gspi.c |
Lijian Zhao | 9bb684a | 2017-10-30 17:03:06 -0700 | [diff] [blame] | 21 | romstage-y += i2c.c |
Lijian Zhao | 9b50a57 | 2017-12-21 13:40:07 -0800 | [diff] [blame] | 22 | romstage-y += lpc.c |
Lijian Zhao | b3dfcb8 | 2017-08-16 22:18:52 -0700 | [diff] [blame] | 23 | romstage-y += pmutil.c |
Andrey Petrov | 9f244a5 | 2017-06-05 18:24:50 -0700 | [diff] [blame] | 24 | romstage-y += reset.c |
Lijian Zhao | 3211117 | 2017-08-16 11:40:03 -0700 | [diff] [blame] | 25 | romstage-y += spi.c |
Nico Huber | a96e66a | 2018-11-11 02:51:14 +0100 | [diff] [blame] | 26 | romstage-y += uart.c |
Lijian Zhao | 8109604 | 2017-05-02 18:54:44 -0700 | [diff] [blame] | 27 | |
Lijian Zhao | 2b074d9 | 2017-08-17 14:25:24 -0700 | [diff] [blame] | 28 | ramstage-y += acpi.c |
Lijian Zhao | 2f764f7 | 2017-07-14 11:09:10 -0700 | [diff] [blame] | 29 | ramstage-y += chip.c |
Pratik Prajapati | 01eda28 | 2017-08-17 21:09:45 -0700 | [diff] [blame] | 30 | ramstage-y += cpu.c |
Tim Wawrzynczak | 7f7c388 | 2021-04-09 12:15:21 -0600 | [diff] [blame] | 31 | ramstage-y += dptf.c |
Duncan Laurie | 8601a16 | 2019-01-07 11:55:16 -0800 | [diff] [blame] | 32 | ramstage-y += elog.c |
Lijian Zhao | 6cf501c | 2017-10-10 18:26:18 -0700 | [diff] [blame] | 33 | ramstage-y += finalize.c |
Rizwan Qureshi | 742c6fe | 2018-09-18 22:43:41 +0530 | [diff] [blame] | 34 | ramstage-y += fsp_params.c |
Michael Niewöhner | c4f8fbd | 2020-12-19 14:11:32 +0100 | [diff] [blame] | 35 | ramstage-y += graphics.c |
Lijian Zhao | 3211117 | 2017-08-16 11:40:03 -0700 | [diff] [blame] | 36 | ramstage-y += gspi.c |
Lijian Zhao | 9bb684a | 2017-10-30 17:03:06 -0700 | [diff] [blame] | 37 | ramstage-y += i2c.c |
Subrata Banik | c4986eb | 2018-05-09 14:55:09 +0530 | [diff] [blame] | 38 | ramstage-y += lockdown.c |
Lijian Zhao | a515849 | 2017-08-29 14:37:17 -0700 | [diff] [blame] | 39 | ramstage-y += lpc.c |
Tim Wawrzynczak | d93531b | 2019-04-30 12:52:29 -0600 | [diff] [blame] | 40 | ramstage-y += me.c |
Lijian Zhao | 0e956f2 | 2017-10-22 18:30:39 -0700 | [diff] [blame] | 41 | ramstage-y += nhlt.c |
Subrata Banik | 7837c20 | 2018-05-07 17:13:40 +0530 | [diff] [blame] | 42 | ramstage-y += p2sb.c |
Lijian Zhao | ac87a98 | 2017-08-28 17:46:55 -0700 | [diff] [blame] | 43 | ramstage-y += pmc.c |
Lijian Zhao | b3dfcb8 | 2017-08-16 22:18:52 -0700 | [diff] [blame] | 44 | ramstage-y += pmutil.c |
Michael Niewöhner | b17f3d3 | 2019-10-24 00:19:45 +0200 | [diff] [blame] | 45 | ramstage-y += reset.c |
Lijian Zhao | 3211117 | 2017-08-16 11:40:03 -0700 | [diff] [blame] | 46 | ramstage-y += spi.c |
Lijian Zhao | aa3d78d | 2017-08-08 11:32:35 -0700 | [diff] [blame] | 47 | ramstage-y += systemagent.c |
Nico Huber | a96e66a | 2018-11-11 02:51:14 +0100 | [diff] [blame] | 48 | ramstage-y += uart.c |
Pratik Prajapati | 9027e1b | 2017-08-23 17:37:43 -0700 | [diff] [blame] | 49 | ramstage-y += vr_config.c |
Bora Guvendik | d2c6365 | 2017-09-19 14:04:37 -0700 | [diff] [blame] | 50 | ramstage-y += sd.c |
Karthikeyan Ramasubramanian | 0f71831 | 2019-07-03 13:02:37 -0600 | [diff] [blame] | 51 | ramstage-y += xhci.c |
Lijian Zhao | 8465a81 | 2017-07-11 12:33:22 -0700 | [diff] [blame] | 52 | |
V Sowmya | 91b027a | 2019-03-06 17:32:45 +0530 | [diff] [blame] | 53 | smm-y += elog.c |
Subrata Banik | 7837c20 | 2018-05-07 17:13:40 +0530 | [diff] [blame] | 54 | smm-y += p2sb.c |
Lijian Zhao | f0eb999 | 2017-09-14 14:51:12 -0700 | [diff] [blame] | 55 | smm-y += pmutil.c |
| 56 | smm-y += smihandler.c |
Nico Huber | a96e66a | 2018-11-11 02:51:14 +0100 | [diff] [blame] | 57 | smm-y += uart.c |
Karthikeyan Ramasubramanian | 0f71831 | 2019-07-03 13:02:37 -0600 | [diff] [blame] | 58 | smm-y += xhci.c |
Lijian Zhao | f0eb999 | 2017-09-14 14:51:12 -0700 | [diff] [blame] | 59 | |
Lijian Zhao | b3dfcb8 | 2017-08-16 22:18:52 -0700 | [diff] [blame] | 60 | postcar-y += pmutil.c |
Philipp Deppenwiese | 545ed7a | 2018-02-14 16:47:12 +0100 | [diff] [blame] | 61 | postcar-y += i2c.c |
| 62 | postcar-y += gspi.c |
| 63 | postcar-y += spi.c |
Nico Huber | a96e66a | 2018-11-11 02:51:14 +0100 | [diff] [blame] | 64 | postcar-y += uart.c |
Andrey Petrov | 9f244a5 | 2017-06-05 18:24:50 -0700 | [diff] [blame] | 65 | |
Nick Vaccaro | 9b67579 | 2017-08-29 19:55:57 -0700 | [diff] [blame] | 66 | verstage-y += gspi.c |
Lijian Zhao | 9bb684a | 2017-10-30 17:03:06 -0700 | [diff] [blame] | 67 | verstage-y += i2c.c |
Lijian Zhao | 6d7063c | 2017-08-29 17:26:48 -0700 | [diff] [blame] | 68 | verstage-y += pmutil.c |
Nick Vaccaro | 9b67579 | 2017-08-29 19:55:57 -0700 | [diff] [blame] | 69 | verstage-y += spi.c |
Nico Huber | a96e66a | 2018-11-11 02:51:14 +0100 | [diff] [blame] | 70 | verstage-y += uart.c |
Nick Vaccaro | 9b67579 | 2017-08-29 19:55:57 -0700 | [diff] [blame] | 71 | |
praveen hodagatta pranesh | 521e48c | 2018-09-27 00:00:13 +0800 | [diff] [blame] | 72 | ifeq ($(CONFIG_SOC_INTEL_CANNONLAKE_PCH_H),y) |
| 73 | bootblock-y += gpio_cnp_h.c |
| 74 | romstage-y += gpio_cnp_h.c |
| 75 | ramstage-y += gpio_cnp_h.c |
| 76 | smm-y += gpio_cnp_h.c |
Duncan Laurie | f95b4a7 | 2018-10-29 16:48:02 -0700 | [diff] [blame] | 77 | verstage-y += gpio_cnp_h.c |
praveen hodagatta pranesh | 521e48c | 2018-09-27 00:00:13 +0800 | [diff] [blame] | 78 | else |
| 79 | bootblock-y += gpio.c |
| 80 | romstage-y += gpio.c |
| 81 | ramstage-y += gpio.c |
| 82 | smm-y += gpio.c |
Duncan Laurie | f95b4a7 | 2018-10-29 16:48:02 -0700 | [diff] [blame] | 83 | verstage-y += gpio.c |
praveen hodagatta pranesh | 521e48c | 2018-09-27 00:00:13 +0800 | [diff] [blame] | 84 | endif |
| 85 | |
Subrata Banik | 73b1bd7 | 2019-11-28 13:56:24 +0530 | [diff] [blame] | 86 | bootblock-y += gpio_common.c |
| 87 | ramstage-y += gpio_common.c |
| 88 | |
Arthur Heymans | a449290 | 2019-06-17 10:50:47 +0200 | [diff] [blame] | 89 | ifeq ($(CONFIG_SOC_INTEL_CANNONLAKE),y) |
| 90 | # Not yet in intel-microcode repo |
| 91 | #cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-66-*) |
| 92 | else ifeq ($(CONFIG_SOC_INTEL_COFFEELAKE),y) |
| 93 | ifeq ($(CONFIG_SOC_INTEL_CANNONLAKE_PCH_H),y) |
| 94 | cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0a |
| 95 | cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0b |
| 96 | cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0c |
| 97 | cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0d |
| 98 | else |
| 99 | cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-0a |
| 100 | endif |
| 101 | else ifeq ($(CONFIG_SOC_INTEL_WHISKEYLAKE),y) |
| 102 | cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-0b |
| 103 | cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-0c |
| 104 | else ifeq ($(CONFIG_SOC_INTEL_COMETLAKE),y) |
Tim Crawford | 0698f0f | 2020-11-24 08:42:02 -0700 | [diff] [blame] | 105 | ifeq ($(CONFIG_SOC_INTEL_CANNONLAKE_PCH_H),y) |
| 106 | cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-a5-02 |
| 107 | else |
Felix Singer | 007faee | 2020-04-22 00:14:44 +0200 | [diff] [blame] | 108 | # Missing 06-a6-01 |
| 109 | cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-0c |
| 110 | cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-a6-00 |
| 111 | endif |
Arthur Heymans | a449290 | 2019-06-17 10:50:47 +0200 | [diff] [blame] | 112 | endif |
Lijian Zhao | f9154c5 | 2019-01-11 15:05:16 -0800 | [diff] [blame] | 113 | |
Andrey Petrov | 9f244a5 | 2017-06-05 18:24:50 -0700 | [diff] [blame] | 114 | CPPFLAGS_common += -I$(src)/soc/intel/cannonlake |
| 115 | CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include |
Lijian Zhao | 8109604 | 2017-05-02 18:54:44 -0700 | [diff] [blame] | 116 | |
Lijian Zhao | 0e956f2 | 2017-10-22 18:30:39 -0700 | [diff] [blame] | 117 | # DSP firmware settings files. |
| 118 | NHLT_BLOB_PATH = 3rdparty/blobs/soc/intel/cnl/nhlt-blobs |
| 119 | DMIC_1CH_48KHZ_16B = dmic-1ch-48khz-16b.bin |
| 120 | DMIC_2CH_48KHZ_16B = dmic-2ch-48khz-16b.bin |
| 121 | DMIC_4CH_48KHZ_16B = dmic-4ch-48khz-16b.bin |
| 122 | MAX98357_RENDER = max98357-render-2ch-48khz-24b.bin |
| 123 | DA7219_RENDER_CAPTURE = dialog-2ch-48khz-24b.bin |
N, Harshapriya | 4a1ee4b | 2017-11-28 14:29:26 -0800 | [diff] [blame] | 124 | MAX98373_RENDER_24B = max98373-render-2ch-48khz-24b.bin |
| 125 | MAX98373_RENDER_16B = max98373-render-2ch-48khz-16b.bin |
Lijian Zhao | 0e956f2 | 2017-10-22 18:30:39 -0700 | [diff] [blame] | 126 | |
| 127 | cbfs-files-$(CONFIG_NHLT_DMIC_1CH_16B) += $(DMIC_1CH_48KHZ_16B) |
| 128 | $(DMIC_1CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_1CH_48KHZ_16B) |
| 129 | $(DMIC_1CH_48KHZ_16B)-type := raw |
| 130 | |
| 131 | cbfs-files-$(CONFIG_NHLT_DMIC_2CH_16B) += $(DMIC_2CH_48KHZ_16B) |
| 132 | $(DMIC_2CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_2CH_48KHZ_16B) |
| 133 | $(DMIC_2CH_48KHZ_16B)-type := raw |
| 134 | |
| 135 | cbfs-files-$(CONFIG_NHLT_DMIC_4CH_16B) += $(DMIC_4CH_48KHZ_16B) |
| 136 | $(DMIC_4CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_4CH_48KHZ_16B) |
| 137 | $(DMIC_4CH_48KHZ_16B)-type := raw |
| 138 | |
| 139 | cbfs-files-$(CONFIG_NHLT_MAX98357) += $(MAX98357_RENDER) |
| 140 | $(MAX98357_RENDER)-file := $(NHLT_BLOB_PATH)/$(MAX98357_RENDER) |
| 141 | $(MAX98357_RENDER)-type := raw |
| 142 | |
N, Harshapriya | 4a1ee4b | 2017-11-28 14:29:26 -0800 | [diff] [blame] | 143 | cbfs-files-$(CONFIG_NHLT_MAX98373) += $(MAX98373_RENDER_16B) |
| 144 | $(MAX98373_RENDER_16B)-file := $(NHLT_BLOB_PATH)/$(MAX98373_RENDER_16B) |
| 145 | $(MAX98373_RENDER_16B)-type := raw |
| 146 | |
| 147 | cbfs-files-$(CONFIG_NHLT_MAX98373) += $(MAX98373_RENDER_24B) |
| 148 | $(MAX98373_RENDER_24B)-file := $(NHLT_BLOB_PATH)/$(MAX98373_RENDER_24B) |
| 149 | $(MAX98373_RENDER_24B)-type := raw |
| 150 | |
Lijian Zhao | 0e956f2 | 2017-10-22 18:30:39 -0700 | [diff] [blame] | 151 | cbfs-files-$(CONFIG_NHLT_DA7219) += $(DA7219_RENDER_CAPTURE) |
| 152 | $(DA7219_RENDER_CAPTURE)-file := $(NHLT_BLOB_PATH)/$(DA7219_RENDER_CAPTURE) |
| 153 | $(DA7219_RENDER_CAPTURE)-type := raw |
| 154 | |
Lijian Zhao | 8109604 | 2017-05-02 18:54:44 -0700 | [diff] [blame] | 155 | endif |