blob: 9fda2f9c1a8b0f28855812d6a1ee8011b504bd94 [file] [log] [blame]
Felix Held3c44c622022-01-10 20:57:29 +01001/* SPDX-License-Identifier: GPL-2.0-or-later */
2
3/* TODO: Check if this is still correct */
4
5#include <acpi/acpi.h>
6#include <amdblocks/acpi.h>
7#include <amdblocks/acpimmio.h>
8#include <amdblocks/psp.h>
9#include <amdblocks/smi.h>
10#include <amdblocks/smm.h>
11#include <arch/hlt.h>
12#include <arch/io.h>
13#include <console/console.h>
14#include <cpu/x86/cache.h>
15#include <cpu/x86/smm.h>
16#include <elog.h>
17#include <soc/smi.h>
18#include <soc/smu.h>
19#include <soc/southbridge.h>
20#include <types.h>
21
22static void fch_apmc_smi_handler(void)
23{
24 const uint8_t cmd = inb(pm_acpi_smi_cmd_port());
25
26 switch (cmd) {
27 case APM_CNT_ACPI_ENABLE:
28 acpi_clear_pm_gpe_status();
29 acpi_enable_sci();
30 break;
31 case APM_CNT_ACPI_DISABLE:
32 acpi_disable_sci();
33 break;
34 case APM_CNT_ELOG_GSMI:
35 if (CONFIG(ELOG_GSMI))
36 handle_smi_gsmi();
37 break;
38 case APM_CNT_SMMSTORE:
39 if (CONFIG(SMMSTORE))
40 handle_smi_store();
41 break;
42 case APM_CNT_SMMINFO:
43 psp_notify_smm();
44 break;
45 }
46
47 mainboard_smi_apmc(cmd);
48}
49
50static void fch_slp_typ_handler(void)
51{
52 uint32_t pci_ctrl, reg32;
53 uint16_t pm1cnt, reg16;
54 uint8_t slp_typ, rst_ctrl;
55
56 /* Figure out SLP_TYP */
57 pm1cnt = acpi_read16(MMIO_ACPI_PM1_CNT_BLK);
58 printk(BIOS_SPEW, "SMI#: SLP = 0x%04x\n", pm1cnt);
59 slp_typ = acpi_sleep_from_pm1(pm1cnt);
60
61 /* Do any mainboard sleep handling */
62 mainboard_smi_sleep(slp_typ);
63
64 switch (slp_typ) {
65 case ACPI_S0:
66 printk(BIOS_DEBUG, "SMI#: Entering S0 (On)\n");
67 break;
68 case ACPI_S3:
69 printk(BIOS_DEBUG, "SMI#: Entering S3 (Suspend-To-RAM)\n");
70 break;
71 case ACPI_S4:
72 printk(BIOS_DEBUG, "SMI#: Entering S4 (Suspend-To-Disk)\n");
73 break;
74 case ACPI_S5:
75 printk(BIOS_DEBUG, "SMI#: Entering S5 (Soft Power off)\n");
76 break;
77 default:
78 printk(BIOS_DEBUG, "SMI#: ERROR: SLP_TYP reserved\n");
79 break;
80 }
81
82 if (slp_typ >= ACPI_S3) {
83 wbinvd();
84
85 clear_all_smi_status();
86
87 /* Do not send SMI before AcpiPm1CntBlkx00[SlpTyp] */
88 pci_ctrl = pm_read32(PM_PCI_CTRL);
89 pci_ctrl &= ~FORCE_SLPSTATE_RETRY;
90 pm_write32(PM_PCI_CTRL, pci_ctrl);
91
92 /* Enable SlpTyp */
93 rst_ctrl = pm_read8(PM_RST_CTRL1);
94 rst_ctrl |= SLPTYPE_CONTROL_EN;
95 pm_write8(PM_RST_CTRL1, rst_ctrl);
96
97 /*
98 * Before the final command, check if there's pending wake
99 * event. Read enable first, so that reading the actual status
100 * is as close as possible to entering S3. The idea is to
101 * minimize the opportunity for a wake event to happen before
102 * actually entering S3. If there's a pending wake event, log
103 * it and continue normal path. S3 will fail and the wake event
104 * becomes a SCI.
105 */
106 if (CONFIG(ELOG_GSMI)) {
107 reg16 = acpi_read16(MMIO_ACPI_PM1_EN);
108 reg16 &= acpi_read16(MMIO_ACPI_PM1_STS);
109 if (reg16)
110 elog_add_extended_event(
111 ELOG_SLEEP_PENDING_PM1_WAKE,
112 (u32)reg16);
113
114 reg32 = acpi_read32(MMIO_ACPI_GPE0_EN);
115 reg32 &= acpi_read32(MMIO_ACPI_GPE0_STS);
116 if (reg32)
117 elog_add_extended_event(
118 ELOG_SLEEP_PENDING_GPE0_WAKE,
119 reg32);
120 } /* if (CONFIG(ELOG_GSMI)) */
121
122 if (slp_typ == ACPI_S3)
123 psp_notify_sx_info(ACPI_S3);
124
125 smu_sx_entry(); /* Leave SlpTypeEn clear, SMU will set */
126 printk(BIOS_ERR, "Error: System did not go to sleep\n");
127 hlt();
128 }
129}
130
131int southbridge_io_trap_handler(int smif)
132{
133 return 0;
134}
135
136/*
137 * Table of functions supported in the SMI handler. Note that SMI source setup
138 * in fch.c is unrelated to this list.
139 */
140static const struct smi_sources_t smi_sources[] = {
141 { .type = SMITYPE_SMI_CMD_PORT, .handler = fch_apmc_smi_handler },
142 { .type = SMITYPE_SLP_TYP, .handler = fch_slp_typ_handler},
143};
144
145void *get_smi_source_handler(int source)
146{
147 size_t i;
148
149 for (i = 0 ; i < ARRAY_SIZE(smi_sources) ; i++)
150 if (smi_sources[i].type == source)
151 return smi_sources[i].handler;
152
153 return NULL;
154}