Felix Held | 3c44c62 | 2022-01-10 20:57:29 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| 3 | /* TODO: Check if this is still correct */ |
| 4 | |
| 5 | #include <amdblocks/cpu.h> |
| 6 | #include <amdblocks/mca.h> |
| 7 | #include <amdblocks/reset.h> |
| 8 | #include <amdblocks/smm.h> |
| 9 | #include <assert.h> |
| 10 | #include <console/console.h> |
| 11 | #include <cpu/amd/microcode.h> |
Arthur Heymans | 615818f | 2022-05-31 21:33:43 +0200 | [diff] [blame] | 12 | #include <cpu/amd/mtrr.h> |
Felix Held | 3c44c62 | 2022-01-10 20:57:29 +0100 | [diff] [blame] | 13 | #include <cpu/cpu.h> |
Felix Held | 3c44c62 | 2022-01-10 20:57:29 +0100 | [diff] [blame] | 14 | #include <cpu/x86/mp.h> |
| 15 | #include <cpu/x86/mtrr.h> |
| 16 | #include <cpu/x86/smm.h> |
Fred Reitberger | 135f9eb | 2022-03-24 07:43:17 -0400 | [diff] [blame] | 17 | #include <acpi/acpi.h> |
Felix Held | 3c44c62 | 2022-01-10 20:57:29 +0100 | [diff] [blame] | 18 | #include <device/device.h> |
| 19 | #include <soc/cpu.h> |
| 20 | #include <soc/iomap.h> |
| 21 | #include <types.h> |
| 22 | |
Felix Held | d40e8b6 | 2022-02-07 17:25:44 +0100 | [diff] [blame] | 23 | _Static_assert(CONFIG_MAX_CPUS == 8, "Do not override MAX_CPUS. To reduce the number of " |
Felix Held | 3c44c62 | 2022-01-10 20:57:29 +0100 | [diff] [blame] | 24 | "available cores, use the downcore_mode and disable_smt devicetree settings instead."); |
| 25 | |
| 26 | /* MP and SMM loading initialization */ |
| 27 | |
| 28 | /* |
| 29 | * Do essential initialization tasks before APs can be fired up - |
| 30 | * |
| 31 | * 1. Prevent race condition in MTRR solution. Enable MTRRs on the BSP. This |
| 32 | * creates the MTRR solution that the APs will use. Otherwise APs will try to |
| 33 | * apply the incomplete solution as the BSP is calculating it. |
| 34 | */ |
| 35 | static void pre_mp_init(void) |
| 36 | { |
Arthur Heymans | 615818f | 2022-05-31 21:33:43 +0200 | [diff] [blame] | 37 | const msr_t syscfg = rdmsr(SYSCFG_MSR); |
| 38 | if (syscfg.lo & SYSCFG_MSR_TOM2WB) |
| 39 | x86_setup_mtrrs_with_detect_no_above_4gb(); |
| 40 | else |
| 41 | x86_setup_mtrrs_with_detect(); |
Felix Held | 3c44c62 | 2022-01-10 20:57:29 +0100 | [diff] [blame] | 42 | x86_mtrr_check(); |
| 43 | } |
| 44 | |
| 45 | static void post_mp_init(void) |
| 46 | { |
| 47 | global_smi_enable(); |
Fred Reitberger | 135f9eb | 2022-03-24 07:43:17 -0400 | [diff] [blame] | 48 | |
| 49 | /* SMMINFO only needs to be set up when booting from S5 */ |
| 50 | if (!acpi_is_wakeup_s3()) |
| 51 | apm_control(APM_CNT_SMMINFO); |
Felix Held | 3c44c62 | 2022-01-10 20:57:29 +0100 | [diff] [blame] | 52 | } |
| 53 | |
| 54 | static const struct mp_ops mp_ops = { |
| 55 | .pre_mp_init = pre_mp_init, |
| 56 | .get_cpu_count = get_cpu_count, |
| 57 | .get_smm_info = get_smm_info, |
| 58 | .relocation_handler = smm_relocation_handler, |
| 59 | .post_mp_init = post_mp_init, |
| 60 | }; |
| 61 | |
| 62 | void mp_init_cpus(struct bus *cpu_bus) |
| 63 | { |
| 64 | if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS) |
| 65 | die_with_post_code(POST_HW_INIT_FAILURE, |
| 66 | "mp_init_with_smm failed. Halting.\n"); |
| 67 | |
| 68 | /* pre_mp_init made the flash not cacheable. Reset to WP for performance. */ |
| 69 | mtrr_use_temp_range(FLASH_BASE_ADDR, CONFIG_ROM_SIZE, MTRR_TYPE_WRPROT); |
| 70 | } |
| 71 | |
| 72 | static void zen_2_3_init(struct device *dev) |
| 73 | { |
| 74 | check_mca(); |
Felix Held | 3c44c62 | 2022-01-10 20:57:29 +0100 | [diff] [blame] | 75 | set_cstate_io_addr(); |
| 76 | |
| 77 | amd_update_microcode_from_cbfs(); |
| 78 | } |
| 79 | |
| 80 | static struct device_operations cpu_dev_ops = { |
| 81 | .init = zen_2_3_init, |
| 82 | }; |
| 83 | |
| 84 | static struct cpu_device_id cpu_table[] = { |
Felix Held | 283999a | 2022-01-12 23:22:19 +0100 | [diff] [blame] | 85 | { X86_VENDOR_AMD, SABRINA_A0_CPUID}, |
Felix Held | 3c44c62 | 2022-01-10 20:57:29 +0100 | [diff] [blame] | 86 | { 0, 0 }, |
| 87 | }; |
| 88 | |
| 89 | static const struct cpu_driver zen_2_3 __cpu_driver = { |
| 90 | .ops = &cpu_dev_ops, |
| 91 | .id_table = cpu_table, |
| 92 | }; |