Frans Hendriks | 2659d40 | 2021-01-26 12:08:18 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
Angel Pons | 899525d | 2021-01-28 10:57:13 +0100 | [diff] [blame] | 3 | #ifndef __MAINBOARD_EMU_Q35_H__ |
| 4 | #define __MAINBOARD_EMU_Q35_H__ |
Frans Hendriks | 2659d40 | 2021-01-26 12:08:18 +0100 | [diff] [blame] | 5 | |
Angel Pons | 816a41c | 2021-01-28 11:09:56 +0100 | [diff] [blame] | 6 | #include <device/pci_type.h> |
Angel Pons | cba669c | 2021-01-28 11:56:45 +0100 | [diff] [blame] | 7 | #include <types.h> |
Angel Pons | 816a41c | 2021-01-28 11:09:56 +0100 | [diff] [blame] | 8 | |
| 9 | #define HOST_BRIDGE PCI_DEV(0, 0, 0) |
| 10 | |
| 11 | #define D0F0_PCIEXBAR_LO 0x60 |
| 12 | #define D0F0_PCIEXBAR_HI 0x64 |
| 13 | |
| 14 | #define D0F0_PAM(x) (0x90 + (x)) /* 0-6 */ |
| 15 | |
| 16 | #define SMRAMC 0x9d |
| 17 | #define G_SMRAME (1 << 3) |
| 18 | #define D_LCK (1 << 4) |
| 19 | #define D_CLS (1 << 5) |
| 20 | #define D_OPEN (1 << 6) |
| 21 | |
| 22 | #define ESMRAMC 0x9e |
| 23 | #define T_EN (1 << 0) |
| 24 | #define TSEG_SZ_MASK (3 << 1) |
| 25 | #define H_SMRAME (1 << 7) |
Frans Hendriks | 2659d40 | 2021-01-26 12:08:18 +0100 | [diff] [blame] | 26 | |
Angel Pons | cba669c | 2021-01-28 11:56:45 +0100 | [diff] [blame] | 27 | uint32_t make_pciexbar(void); |
| 28 | |
| 29 | void mainboard_machine_check(void); |
| 30 | |
Frans Hendriks | 2659d40 | 2021-01-26 12:08:18 +0100 | [diff] [blame] | 31 | #endif |