blob: 13f0766f535a3632aba50d6e9bdd12636f149ea0 [file] [log] [blame]
Angel Pons585495e2020-04-03 01:21:38 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Stefan Reinauer597ff872013-01-07 13:21:22 -08002
Stefan Reinauer4a3bb762004-06-28 11:57:31 +00003#include <device/device.h>
Stefan Reinauerd56981f2007-10-22 10:07:46 +00004#include <device/pci.h>
Stefan Reinauerd56981f2007-10-22 10:07:46 +00005#include <device/pci_ops.h>
Stefan Reinauer65e9bc12009-03-13 17:00:46 +00006#include <pc80/keyboard.h>
Stefan Reinauer4a3bb762004-06-28 11:57:31 +00007
Gerd Hoffmann082d2a02013-05-29 14:59:36 +02008static const unsigned char qemu_i440fx_irqs[] = {
9 11, 10, 10, 11,
10 11, 10, 10, 11,
11};
Ronald G. Minnich rminnich4a8523a2009-04-07 02:18:13 +000012
Angel Pons5124c132021-06-28 14:11:38 +020013#define D0F0_PAM(x) (0x59 + (x)) /* 0-6 */
14
Elyes HAOUAS5cb876c2018-06-08 18:31:43 +020015static void qemu_nb_init(struct device *dev)
Stefan Reinauerd56981f2007-10-22 10:07:46 +000016{
Kevin O'Connor31b2e8f2010-09-06 20:20:47 +000017 /* Map memory at 0xc0000 - 0xfffff */
18 int i;
Angel Pons5124c132021-06-28 14:11:38 +020019 pci_or_config8(dev, D0F0_PAM(0), 0x30);
20 for (i = 1; i <= 6; i++)
21 pci_write_config8(dev, D0F0_PAM(i), 0x33);
Aaron Lwe2342f8b2008-05-06 15:02:22 +000022
Paul Menzelfeecdc22020-06-20 23:01:37 +020023 /* This sneaked in here, because Qemu does not emulate a SuperIO chip. */
Timothy Pearson448e3862015-11-24 14:12:01 -060024 pc_keyboard_init(NO_AUX_DEVICE);
Ronald G. Minnich rminnich4a8523a2009-04-07 02:18:13 +000025
Gerd Hoffmann082d2a02013-05-29 14:59:36 +020026 /* setup IRQ routing */
Angel Ponsc76c59a2021-06-28 14:00:57 +020027 for (i = 0; i < 32; i++) {
28 struct device *d = pcidev_on_root(i, 0);
29 if (d)
30 pci_assign_irqs(d, qemu_i440fx_irqs + (i % 4));
31 }
Stefan Reinauerd56981f2007-10-22 10:07:46 +000032}
33
Patrick Rudolph82e111c2021-01-07 14:12:38 +010034static void qemu_nb_read_resources(struct device *dev)
35{
36 pci_dev_read_resources(dev);
37
38 if (CONFIG(ARCH_RAMSTAGE_X86_64)) {
39 /* Reserve page tables in DRAM. FIXME: Remove once x86_64 page tables reside in CBMEM */
Kyösti Mälkki27d62992022-05-24 20:25:58 +030040 reserved_ram_resource_kb(dev, 0, CONFIG_ARCH_X86_64_PGTBL_LOC / KiB,
Patrick Rudolph82e111c2021-01-07 14:12:38 +010041 (6 * 0x1000) / KiB);
42 }
43}
44
Kevin O'Connor31b2e8f2010-09-06 20:20:47 +000045static struct device_operations nb_operations = {
Patrick Rudolph82e111c2021-01-07 14:12:38 +010046 .read_resources = qemu_nb_read_resources,
Gerd Hoffmann7fd1bee2013-06-17 10:03:17 +020047 .set_resources = pci_dev_set_resources,
48 .enable_resources = pci_dev_enable_resources,
49 .init = qemu_nb_init,
Kevin O'Connor31b2e8f2010-09-06 20:20:47 +000050};
51
52static const struct pci_driver nb_driver __pci_driver = {
53 .ops = &nb_operations,
54 .vendor = 0x8086,
55 .device = 0x1237,
56};