Gitiles
Code Review Sign In
review.coreboot.org / coreboot / 26c182340fa5569f034a50010bb6d47ed13e5fd6 / . / src / mainboard / amd / bimini_fam10 / irq_tables.c
blob: 9825559b662934489392526eaecb4dfc172127ef [file] [log] [blame]
Kerry Sheee5fcac2011-01-01 18:04:42 +0000[diff] [blame]1/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2010 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
20#include <console/console.h>
21#include <device/pci.h>
22#include <string.h>
23#include <stdint.h>
24#include <arch/pirq_routing.h>
Kerry Sheee5fcac2011-01-01 18:04:42 +0000[diff] [blame]25#include <cpu/amd/amdfam10_sysconf.h>
26
Kerry Sheee5fcac2011-01-01 18:04:42 +0000[diff] [blame]27static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
28 u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
29 u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
30 u8 slot, u8 rfu)
31{
32 pirq_info->bus = bus;
33 pirq_info->devfn = devfn;
34 pirq_info->irq[0].link = link0;
35 pirq_info->irq[0].bitmap = bitmap0;
36 pirq_info->irq[1].link = link1;
37 pirq_info->irq[1].bitmap = bitmap1;
38 pirq_info->irq[2].link = link2;
39 pirq_info->irq[2].bitmap = bitmap2;
40 pirq_info->irq[3].link = link3;
41 pirq_info->irq[3].bitmap = bitmap3;
42 pirq_info->slot = slot;
43 pirq_info->rfu = rfu;
44}
Uwe Hermann26c18232011-01-01 18:40:02 +0000[diff] [blame^]45
Kerry Sheee5fcac2011-01-01 18:04:42 +0000[diff] [blame]46extern u8 bus_isa;
47extern u8 bus_rs780[8];
48extern u8 bus_sb800[2];
49extern unsigned long sbdn_sb800;
50
51unsigned long write_pirq_routing_table(unsigned long addr)
52{
53 struct irq_routing_table *pirq;
54 struct irq_info *pirq_info;
55 u32 slot_num;
56 u8 *v;
57
58 u8 sum = 0;
59 int i;
60
61 get_bus_conf(); /* it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c */
62
63 /* Align the table to be 16 byte aligned. */
64 addr += 15;
65 addr &= ~15;
66
67 /* This table must be betweeen 0xf0000 & 0x100000 */
68 printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
69
70 pirq = (void *)(addr);
71 v = (u8 *) (addr);
72
73 pirq->signature = PIRQ_SIGNATURE;
74 pirq->version = PIRQ_VERSION;
75
76 pirq->rtr_bus = bus_sb800[0];
77 pirq->rtr_devfn = ((sbdn_sb800 + 0x14) << 3) | 4;
78
79 pirq->exclusive_irqs = 0;
80
81 pirq->rtr_vendor = 0x1002;
82 pirq->rtr_device = 0x4384;
83
84 pirq->miniport_data = 0;
85
86 memset(pirq->rfu, 0, sizeof(pirq->rfu));
87
88 pirq_info = (void *)(&pirq->checksum + 1);
89 slot_num = 0;
90
91 /* pci bridge */
92 write_pirq_info(pirq_info, bus_sb800[0], ((sbdn_sb800 + 0x14) << 3) | 4,
93 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
94 0);
95 pirq_info++;
96 slot_num++;
97
98 pirq->size = 32 + 16 * slot_num;
99
100 for (i = 0; i < pirq->size; i++)
101 sum += v[i];
102
103 sum = pirq->checksum - sum;
104 if (sum != pirq->checksum) {
105 pirq->checksum = sum;
106 }
107
108 printk(BIOS_INFO, "write_pirq_routing_table done.\n");
109
110 return (unsigned long)pirq_info;
111}