Angel Pons | 08b5280 | 2020-04-05 13:22:20 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Elyes HAOUAS | a1e22b8 | 2019-03-18 22:49:36 +0100 | [diff] [blame] | 2 | |
Hannah Williams | 5e83e8b | 2018-02-09 18:35:17 -0800 | [diff] [blame] | 3 | #include <baseboard/variants.h> |
| 4 | #include <boardid.h> |
Aaron Durbin | 042b53a | 2018-08-07 12:30:53 -0600 | [diff] [blame] | 5 | #include <console/console.h> |
| 6 | #include <ec/google/chromeec/ec.h> |
Furquan Shaikh | 3487095 | 2018-10-23 07:29:42 -0700 | [diff] [blame] | 7 | #include <memory_info.h> |
Hannah Williams | 5e83e8b | 2018-02-09 18:35:17 -0800 | [diff] [blame] | 8 | #include <soc/meminit.h> |
| 9 | #include <soc/romstage.h> |
| 10 | |
| 11 | void mainboard_memory_init_params(FSPM_UPD *memupd) |
| 12 | { |
Ravi Sarawadi | 3c2310d | 2018-02-20 16:19:25 -0800 | [diff] [blame] | 13 | meminit_lpddr4_by_sku(&memupd->FspmConfig, |
| 14 | variant_lpddr4_config(), variant_memory_sku()); |
Hannah Williams | 5e83e8b | 2018-02-09 18:35:17 -0800 | [diff] [blame] | 15 | } |
| 16 | |
Aaron Durbin | 042b53a | 2018-08-07 12:30:53 -0600 | [diff] [blame] | 17 | static void save_dimm_info_by_sku_config(void) |
Hannah Williams | 5e83e8b | 2018-02-09 18:35:17 -0800 | [diff] [blame] | 18 | { |
Ravi Sarawadi | 036aff9 | 2018-04-26 14:32:33 -0700 | [diff] [blame] | 19 | save_lpddr4_dimm_info(variant_lpddr4_config(), variant_memory_sku()); |
Hannah Williams | 5e83e8b | 2018-02-09 18:35:17 -0800 | [diff] [blame] | 20 | } |
Aaron Durbin | 042b53a | 2018-08-07 12:30:53 -0600 | [diff] [blame] | 21 | |
| 22 | void mainboard_save_dimm_info(void) |
| 23 | { |
Furquan Shaikh | 3487095 | 2018-10-23 07:29:42 -0700 | [diff] [blame] | 24 | char part_num_store[DIMM_INFO_PART_NUMBER_SIZE]; |
Aaron Durbin | 042b53a | 2018-08-07 12:30:53 -0600 | [diff] [blame] | 25 | const char *part_num = NULL; |
| 26 | |
Aaron Durbin | 702d236 | 2019-06-10 10:37:40 -0600 | [diff] [blame] | 27 | if (CONFIG(DRAM_PART_NUM_NOT_ALWAYS_IN_CBI)) { |
Aaron Durbin | 042b53a | 2018-08-07 12:30:53 -0600 | [diff] [blame] | 28 | /* Fall back on part numbers encoded in lp4cfg array. */ |
Julius Werner | 7c712bb | 2019-05-01 16:51:20 -0700 | [diff] [blame] | 29 | if ((int)board_id() < CONFIG_DRAM_PART_IN_CBI_BOARD_ID_MIN) { |
Aaron Durbin | 042b53a | 2018-08-07 12:30:53 -0600 | [diff] [blame] | 30 | save_dimm_info_by_sku_config(); |
| 31 | return; |
| 32 | } |
| 33 | } |
| 34 | |
| 35 | if (google_chromeec_cbi_get_dram_part_num(&part_num_store[0], |
| 36 | ARRAY_SIZE(part_num_store)) < 0) |
| 37 | printk(BIOS_ERR, "ERROR: Couldn't obtain DRAM part number from CBI\n"); |
| 38 | else |
| 39 | part_num = &part_num_store[0]; |
| 40 | |
| 41 | save_lpddr4_dimm_info_part_num(part_num); |
| 42 | } |