| zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2010 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | */ |
| 19 | |
| 20 | #ifndef SB800_SMBUS_H |
| 21 | #define SB800_SMBUS_H |
| 22 | |
| 23 | //#include <stdint.h> |
| 24 | |
| 25 | #define SMBHSTSTAT 0x0 |
| 26 | #define SMBSLVSTAT 0x1 |
| 27 | #define SMBHSTCTRL 0x2 |
| 28 | #define SMBHSTCMD 0x3 |
| 29 | #define SMBHSTADDR 0x4 |
| 30 | #define SMBHSTDAT0 0x5 |
| 31 | #define SMBHSTDAT1 0x6 |
| 32 | #define SMBHSTBLKDAT 0x7 |
| 33 | |
| 34 | #define SMBSLVCTRL 0x8 |
| 35 | #define SMBSLVCMD_SHADOW 0x9 |
| 36 | #define SMBSLVEVT 0xa |
| 37 | #define SMBSLVDAT 0xc |
| 38 | |
| 39 | #define AX_INDXC 0 |
| 40 | #define AX_INDXP 2 |
| 41 | #define AXCFG 4 |
| 42 | #define ABCFG 6 |
| 43 | #define RC_INDXC 1 |
| 44 | #define RC_INDXP 3 |
| 45 | |
| 46 | #define AB_INDX 0xCD8 |
| 47 | #define AB_DATA (AB_INDX+4) |
| 48 | |
| 49 | /* Between 1-10 seconds, We should never timeout normally |
| 50 | * Longer than this is just painful when a timeout condition occurs. |
| 51 | */ |
| 52 | #define SMBUS_TIMEOUT (100*1000*10) |
| 53 | |
| 54 | #define abcfg_reg(reg, mask, val) \ |
| 55 | alink_ab_indx((ABCFG), (reg), (mask), (val)) |
| 56 | #define axcfg_reg(reg, mask, val) \ |
| 57 | alink_ab_indx((AXCFG), (reg), (mask), (val)) |
| 58 | #define axindxc_reg(reg, mask, val) \ |
| 59 | alink_ax_indx((AX_INDXC), (reg), (mask), (val)) |
| 60 | #define axindxp_reg(reg, mask, val) \ |
| 61 | alink_ax_indx((AX_INDXP), (reg), (mask), (val)) |
| 62 | #define rcindxc_reg(reg, port, mask, val) \ |
| 63 | alink_rc_indx((RC_INDXC), (reg), (port), (mask), (val)) |
| 64 | #define rcindxp_reg(reg, port, mask, val) \ |
| 65 | alink_rc_indx((RC_INDXP), (reg), (port), (mask), (val)) |
| 66 | |
| 67 | int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address); |
| 68 | int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address, u8 val); |
| 69 | int do_smbus_recv_byte(u32 smbus_io_base, u32 device); |
| 70 | int do_smbus_send_byte(u32 smbus_io_base, u32 device, u8 val); |
| 71 | void alink_rc_indx(u32 reg_space, u32 reg_addr, u32 port, u32 mask, u32 val); |
| 72 | void alink_ab_indx(u32 reg_space, u32 reg_addr, u32 mask, u32 val); |
| 73 | void alink_ax_indx(u32 space /*c or p? */ , u32 axindc, u32 mask, u32 val); |
| 74 | |
| 75 | |
| 76 | #endif |