blob: fd3ff54f7d3497e6149ab8249702c46cd02d51fc [file] [log] [blame]
Marc Jones24484842017-05-04 21:17:45 -06001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2007-2009 coresystems GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of
9 * the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17/* 0:12.0 - OHCI */
18Device(UOH1) {
19 Name(_ADR, 0x00120000)
20 Name(_PRW, Package() {0x0B, 3})
21} /* end UOH1 */
22
23/* 0:12.2 - EHCI */
24Device(UOH2) {
25 Name(_ADR, 0x00120002)
26 Name(_PRW, Package() {0x0B, 3})
27} /* end UOH2 */
28
29/* 0:13.0 - OHCI */
30Device(UOH3) {
31 Name(_ADR, 0x00130000)
32 Name(_PRW, Package() {0x0B, 3})
33} /* end UOH3 */
34
35/* 0:13.2 - EHCI */
36Device(UOH4) {
37 Name(_ADR, 0x00130002)
38 Name(_PRW, Package() {0x0B, 3})
39} /* end UOH4 */
40
41/* 0:16.0 - OHCI */
42Device(UOH5) {
43 Name(_ADR, 0x00160000)
44 Name(_PRW, Package() {0x0B, 3})
45} /* end UOH5 */
46
47/* 0:16.2 - EHCI */
48Device(UOH6) {
49 Name(_ADR, 0x00160002)
50 Name(_PRW, Package() {0x0B, 3})
51} /* end UOH5 */
52
53/* 0:10.0 - XHCI 0*/
54Device(XHC0) {
55 Name(_ADR, 0x00100000)
56 Name(_PRW, Package() {0x0B, 4})
57} /* end XHC0 */
58
59#if !CONFIG_SOUTHBRIDGE_AMD_PI_AVALON && !CONFIG_SOUTHBRIDGE_AMD_PI_KERN
60/* 0:10.1 - XHCI 1*/
61Device(XHC1) {
62 Name(_ADR, 0x00100001)
63 Name(_PRW, Package() {0x0B, 4})
64} /* end XHC1 */
65#endif