blob: 39bd6b9acae0db072066b830957ec24a36892c1d [file] [log] [blame]
Richard Smithcb8eab42006-07-24 04:25:47 +00001#include <console/console.h>
2#include <arch/io.h>
3#include <stdint.h>
4#include <device/device.h>
5#include <device/pci.h>
6#include <device/pci_ids.h>
7#include <stdlib.h>
8#include <string.h>
9#include <bitops.h>
Corey Osgoode562f722008-12-19 03:36:48 +000010#include <cpu/cpu.h>
11#include <pc80/keyboard.h>
Richard Smithcb8eab42006-07-24 04:25:47 +000012#include "northbridge.h"
Uwe Hermann1a9c8922007-04-01 17:24:03 +000013#include "i440bx.h"
Richard Smithcb8eab42006-07-24 04:25:47 +000014
Myles Watson032a9652009-05-11 22:24:53 +000015static void northbridge_init(device_t dev)
Richard Smithcb8eab42006-07-24 04:25:47 +000016{
Stefan Reinauerc02b4fc2010-03-22 11:42:32 +000017 printk(BIOS_SPEW, "Northbridge Init\n");
Richard Smithcb8eab42006-07-24 04:25:47 +000018}
19
Richard Smithcb8eab42006-07-24 04:25:47 +000020static struct device_operations northbridge_operations = {
21 .read_resources = pci_dev_read_resources,
22 .set_resources = pci_dev_set_resources,
23 .enable_resources = pci_dev_enable_resources,
24 .init = northbridge_init,
25 .enable = 0,
26 .ops_pci = 0,
27};
28
Stefan Reinauerf1cf1f72007-10-24 09:08:58 +000029static const struct pci_driver northbridge_driver __pci_driver = {
Richard Smithcb8eab42006-07-24 04:25:47 +000030 .ops = &northbridge_operations,
31 .vendor = PCI_VENDOR_ID_INTEL,
Myles Watson032a9652009-05-11 22:24:53 +000032 .device = 0x7190,
Richard Smithcb8eab42006-07-24 04:25:47 +000033};
34
Patrick Georgie1667822012-05-05 15:29:32 +020035#if CONFIG_WRITE_HIGH_TABLES
Rudolf Marek97be27e2010-12-13 19:50:25 +000036#include <cbmem.h>
Stefan Reinauerb5fb0c52009-04-30 13:58:42 +000037#endif
Myles Watson032a9652009-05-11 22:24:53 +000038
Myles Watson29cc9ed2009-07-02 18:56:24 +000039static void i440bx_domain_set_resources(device_t dev)
Richard Smithcb8eab42006-07-24 04:25:47 +000040{
Richard Smithcb8eab42006-07-24 04:25:47 +000041 device_t mc_dev;
Uwe Hermannf5a6fd22007-05-27 23:31:31 +000042 uint32_t pci_tolm;
Richard Smithcb8eab42006-07-24 04:25:47 +000043
Myles Watson894a3472010-06-09 22:41:35 +000044 pci_tolm = find_pci_tolm(dev->link_list);
45 mc_dev = dev->link_list->children;
Richard Smithcb8eab42006-07-24 04:25:47 +000046 if (mc_dev) {
47 unsigned long tomk, tolmk;
Uwe Hermann1a9c8922007-04-01 17:24:03 +000048 int idx;
Richard Smithcb8eab42006-07-24 04:25:47 +000049
Uwe Hermannf5a6fd22007-05-27 23:31:31 +000050 /* Figure out which areas are/should be occupied by RAM. The
51 * value of the highest DRB denotes the end of the physical
52 * memory (in units of 8MB).
Uwe Hermann1a9c8922007-04-01 17:24:03 +000053 */
Uwe Hermannf5a6fd22007-05-27 23:31:31 +000054 tomk = ((unsigned long)pci_read_config8(mc_dev, DRB7));
Uwe Hermannf03e4e92007-05-10 23:59:20 +000055
Uwe Hermannf5a6fd22007-05-27 23:31:31 +000056 /* Convert to KB. */
57 tomk *= (8 * 1024);
58
Stefan Reinauerc02b4fc2010-03-22 11:42:32 +000059 printk(BIOS_DEBUG, "Setting RAM size to %ld MB\n", tomk / 1024);
Uwe Hermannf5a6fd22007-05-27 23:31:31 +000060
61 /* Compute the top of low memory. */
62 tolmk = pci_tolm / 1024;
63
Richard Smithcb8eab42006-07-24 04:25:47 +000064 if (tolmk >= tomk) {
Myles Watson032a9652009-05-11 22:24:53 +000065 /* The PCI hole does not overlap the memory. */
Richard Smithcb8eab42006-07-24 04:25:47 +000066 tolmk = tomk;
67 }
Uwe Hermann1a9c8922007-04-01 17:24:03 +000068
Uwe Hermannf5a6fd22007-05-27 23:31:31 +000069 /* Report the memory regions. */
Richard Smithcb8eab42006-07-24 04:25:47 +000070 idx = 10;
Uwe Hermann1a9c8922007-04-01 17:24:03 +000071 ram_resource(dev, idx++, 0, 640);
Uwe Hermannf5a6fd22007-05-27 23:31:31 +000072 ram_resource(dev, idx++, 768, tolmk - 768);
Myles Watson032a9652009-05-11 22:24:53 +000073
Patrick Georgie1667822012-05-05 15:29:32 +020074#if CONFIG_WRITE_HIGH_TABLES
Stefan Reinauerb5fb0c52009-04-30 13:58:42 +000075 /* Leave some space for ACPI, PIRQ and MP tables */
Rudolf Marek97be27e2010-12-13 19:50:25 +000076 high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
77 high_tables_size = HIGH_MEMORY_SIZE;
Stefan Reinauerb5fb0c52009-04-30 13:58:42 +000078#endif
Richard Smithcb8eab42006-07-24 04:25:47 +000079 }
Myles Watson894a3472010-06-09 22:41:35 +000080 assign_resources(dev->link_list);
Richard Smithcb8eab42006-07-24 04:25:47 +000081}
82
Richard Smithcb8eab42006-07-24 04:25:47 +000083static struct device_operations pci_domain_ops = {
Myles Watson032a9652009-05-11 22:24:53 +000084 .read_resources = pci_domain_read_resources,
Myles Watson29cc9ed2009-07-02 18:56:24 +000085 .set_resources = i440bx_domain_set_resources,
Myles Watson7eac4452010-06-17 16:16:56 +000086 .enable_resources = NULL,
87 .init = NULL,
Myles Watson032a9652009-05-11 22:24:53 +000088 .scan_bus = pci_domain_scan_bus,
89};
Richard Smithcb8eab42006-07-24 04:25:47 +000090
91static void cpu_bus_init(device_t dev)
92{
Myles Watson894a3472010-06-09 22:41:35 +000093 initialize_cpus(dev->link_list);
Richard Smithcb8eab42006-07-24 04:25:47 +000094}
95
96static void cpu_bus_noop(device_t dev)
97{
98}
99
100static struct device_operations cpu_bus_ops = {
Myles Watson032a9652009-05-11 22:24:53 +0000101 .read_resources = cpu_bus_noop,
102 .set_resources = cpu_bus_noop,
103 .enable_resources = cpu_bus_noop,
104 .init = cpu_bus_init,
105 .scan_bus = 0,
Richard Smithcb8eab42006-07-24 04:25:47 +0000106};
107
108static void enable_dev(struct device *dev)
109{
Myles Watson032a9652009-05-11 22:24:53 +0000110 /* Set the operations if it is a special bus type */
111 if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
112 dev->ops = &pci_domain_ops;
Richard Smithcb8eab42006-07-24 04:25:47 +0000113 pci_set_method(dev);
Myles Watson032a9652009-05-11 22:24:53 +0000114 }
115 else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) {
116 dev->ops = &cpu_bus_ops;
117 }
Richard Smithcb8eab42006-07-24 04:25:47 +0000118}
119
120struct chip_operations northbridge_intel_i440bx_ops = {
Uwe Hermannf5a6fd22007-05-27 23:31:31 +0000121 CHIP_NAME("Intel 82443BX (440BX) Northbridge")
Uwe Hermann1a9c8922007-04-01 17:24:03 +0000122 .enable_dev = enable_dev,
Richard Smithcb8eab42006-07-24 04:25:47 +0000123};