blob: 3b9ecab3a6d04e05881608f7694d3f5445030e60 [file] [log] [blame]
Dtrain Hsua6d337b2023-05-18 17:28:42 +08001fw_config
Dtrain Hsu764167b2023-05-18 17:34:56 +08002 field DB_LTE 1 1
3 option LTE_ABSENT 0
4 option LTE_PRESENT 1
5 end
Dtrain Hsu9be583e2023-05-18 17:32:01 +08006 field TOUCHPAD 8 9
7 option TOUCHPAD_UNKNOWN 0
8 option TOUCHPAD_EKT3744 1
9 option TOUCHPAD_GT7863 2
10 end
Dtrain Hsua6d337b2023-05-18 17:28:42 +080011 field TOUCHSCREEN 10 12
12 option TOUCHSCREEN_UNKNOWN 0
13 option TOUCHSCREEN_NONE 1
14 option TOUCHSCREEN_EKTH7D18 2
15 option TOUCHSCREEN_GT7996F 3
16 option TOUCHSCREEN_EKTH5012 4
17 option TOUCHSCREEN_WDT8752A 5
18 option TOUCHSCREEN_GTCH7502 6
19 end
Dtrain Hsu22c616e2023-07-13 11:22:54 +080020 field EXT_VR 14 14
21 option EXT_VR_PRESENT 0
22 option EXT_VR_ABSENT 1
23 end
Dtrain Hsua6d337b2023-05-18 17:28:42 +080024end
25
van_chene5fa3b12023-03-13 14:57:00 +080026chip soc/intel/alderlake
Van Chendea2c472023-03-21 09:34:18 +080027 register "sagv" = "SaGv_Enabled"
van_chene5fa3b12023-03-13 14:57:00 +080028
Dtrain Hsu995772f2023-05-03 17:24:16 +080029 # EMMC Tx CMD Delay
30 # Refer to EDS-Vol2-42.3.7.
31 # [14:8] steps of delay for DDR mode, each 125ps, range: 0 - 39.
32 # [6:0] steps of delay for SDR mode, each 125ps, range: 0 - 39.
33 register "common_soc_config.emmc_dll.emmc_tx_cmd_cntl" = "0x00000505"
34
35 # EMMC TX DATA Delay 1
36 # Refer to EDS-Vol2-42.3.8.
37 # [14:8] steps of delay for HS400, each 125ps, range: 0 - 78.
38 # [6:0] steps of delay for SDR104/HS200, each 125ps, range: 0 - 79.
Dtrain Hsu5ef37962023-05-26 13:54:05 +080039 register "common_soc_config.emmc_dll.emmc_tx_data_cntl1" = "0x00000909"
Dtrain Hsu995772f2023-05-03 17:24:16 +080040
41 # EMMC TX DATA Delay 2
42 # Refer to EDS-Vol2-42.3.9.
43 # [30:24] steps of delay for SDR50, each 125ps, range: 0 - 79.
44 # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78.
45 # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 -79.
46 # [6:0] steps of delay for SDR12, each 125ps. Range: 0 - 79.
Dtrain Hsu5ef37962023-05-26 13:54:05 +080047 register "common_soc_config.emmc_dll.emmc_tx_data_cntl2" = "0x1c272828"
Dtrain Hsu995772f2023-05-03 17:24:16 +080048
49 # EMMC RX CMD/DATA Delay 1
50 # Refer to EDS-Vol2-42.3.10.
51 # [30:24] steps of delay for SDR50, each 125ps, range: 0 - 119.
52 # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78.
53 # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 - 119.
54 # [6:0] steps of delay for SDR12, each 125ps, range: 0 - 119.
Dtrain Hsu5ef37962023-05-26 13:54:05 +080055 register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1c171835"
Dtrain Hsu995772f2023-05-03 17:24:16 +080056
57 # EMMC RX CMD/DATA Delay 2
58 # Refer to EDS-Vol2-42.3.12.
59 # [17:16] stands for Rx Clock before Output Buffer,
60 # 00: Rx clock after output buffer,
61 # 01: Rx clock before output buffer,
62 # 10: Automatic selection based on working mode.
63 # 11: Reserved
64 # [14:8] steps of delay for Auto Tuning Mode, each 125ps, range: 0 - 39.
65 # [6:0] steps of delay for HS200, each 125ps, range: 0 - 79.
Dtrain Hsu5ef37962023-05-26 13:54:05 +080066 register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x00010025"
Dtrain Hsu995772f2023-05-03 17:24:16 +080067
68 # EMMC Rx Strobe Delay
69 # Refer to EDS-Vol2-42.3.11.
70 # [14:8] Rx Strobe Delay DLL 1(HS400 Mode), each 125ps, range: 0 - 39.
71 # [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps, range: 0 - 39.
Dtrain Hsu5ef37962023-05-26 13:54:05 +080072 register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x00001111"
Dtrain Hsu995772f2023-05-03 17:24:16 +080073
Van Chendea2c472023-03-21 09:34:18 +080074 # SOC Aux orientation override:
75 # This is a bitfield that corresponds to up to 4 TCSS ports.
76 # Bits (0,1) allocated for TCSS Port1 configuration and Bits (2,3)for TCSS Port2.
77 # TcssAuxOri = 0101b
78 # Bit0,Bit2 set to "1" indicates no retimer on USBC Ports
79 # Bit1,Bit3 set to "0" indicates Aux lines are not swapped on the
80 # motherboard to USBC connector
81
82 register "tcss_aux_ori" = "5"
83 register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"
84 register "typec_aux_bias_pads[1]" = "{.pad_auxp_dc = GPP_A21, .pad_auxn_dc = GPP_A22}"
85
86 register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # World Facing Camera
87 register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for CNVi WLAN
88
89 register "serial_io_i2c_mode" = "{
90 [PchSerialIoIndexI2C0] = PchSerialIoPci,
91 [PchSerialIoIndexI2C1] = PchSerialIoPci,
92 [PchSerialIoIndexI2C2] = PchSerialIoDisabled,
93 [PchSerialIoIndexI2C3] = PchSerialIoPci,
94 [PchSerialIoIndexI2C4] = PchSerialIoDisabled,
95 [PchSerialIoIndexI2C5] = PchSerialIoPci,
96 }"
97
Dtrain Hsueebf63c2023-06-27 10:50:51 +080098 register "tcc_offset" = "3"
99
Van Chendea2c472023-03-21 09:34:18 +0800100 # Intel Common SoC Config
101 #+-------------------+---------------------------+
102 #| Field | Value |
103 #+-------------------+---------------------------+
104 #| I2C0 | TPM. Early init is |
105 #| | required to set up a BAR |
106 #| | for TPM communication |
107 #| I2C1 | Touchscreen |
108 #| I2C2 | |
109 #| I2C3 | Audio |
110 #| I2C5 | Trackpad |
111 #+-------------------+---------------------------+
112 register "common_soc_config" = "{
113 .i2c[0] = {
114 .early_init = 1,
115 .speed = I2C_SPEED_FAST_PLUS,
116 .speed_config[0] = {
117 .speed = I2C_SPEED_FAST_PLUS,
118 .scl_lcnt = 55,
119 .scl_hcnt = 30,
120 .sda_hold = 7,
121 }
122 },
123 .i2c[1] = {
124 .speed = I2C_SPEED_FAST,
125 .speed_config[0] = {
126 .speed = I2C_SPEED_FAST,
127 .scl_lcnt = 158,
128 .scl_hcnt = 79,
129 .sda_hold = 7,
130 }
131 },
132 .i2c[3] = {
133 .speed = I2C_SPEED_FAST,
134 .speed_config[0] = {
135 .speed = I2C_SPEED_FAST,
136 .scl_lcnt = 158,
137 .scl_hcnt = 79,
138 .sda_hold = 7,
139 }
140 },
141 .i2c[5] = {
142 .speed = I2C_SPEED_FAST,
143 .speed_config[0] = {
144 .speed = I2C_SPEED_FAST,
145 .scl_lcnt = 158,
146 .scl_hcnt = 79,
147 .sda_hold = 7,
148 }
149 },
150 }"
151
152 device domain 0 on
Dtrain Hsu1b3b0982023-05-24 16:11:44 +0800153 device ref dtt on
154 chip drivers/intel/dptf
155 ## sensor information
156 register "options.tsr[0].desc" = ""CPU_VR""
157 register "options.tsr[1].desc" = ""Charger""
158 register "options.tsr[2].desc" = ""Ambient""
159
160 ## Passive Policy
161 register "policies.passive" = "{
162 [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
163 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 85, 5000),
164 [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 85, 5000),
165 [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 85, 5000),
166 }"
167 ## Critical Policy
168 register "policies.critical" = "{
Dtrain Hsueebf63c2023-06-27 10:50:51 +0800169 [0] = DPTF_CRITICAL(CPU, 130, SHUTDOWN),
170 [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 105, SHUTDOWN),
171 [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 105, SHUTDOWN),
172 [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 105, SHUTDOWN),
Dtrain Hsu1b3b0982023-05-24 16:11:44 +0800173 }"
174
175 register "controls.power_limits" = "{
176 .pl1 = {
177 .min_power = 3000,
178 .max_power = 6000,
179 .time_window_min = 28 * MSECS_PER_SEC,
180 .time_window_max = 28 * MSECS_PER_SEC,
Dtrain Hsueebf63c2023-06-27 10:50:51 +0800181 .granularity = 125
Dtrain Hsu1b3b0982023-05-24 16:11:44 +0800182 },
183 .pl2 = {
184 .min_power = 25000,
185 .max_power = 25000,
186 .time_window_min = 28 * MSECS_PER_SEC,
187 .time_window_max = 28 * MSECS_PER_SEC,
188 .granularity = 1000
189 }
190 }"
191
192 ## Charger Performance Control (Control, mA)
193 register "controls.charger_perf" = "{
194 [0] = { 255, 1700 },
195 [1] = { 24, 1500 },
196 [2] = { 16, 1000 },
197 [3] = { 8, 500 }
198 }"
199 device generic 0 on end
200 end
201 end
Van Chendea2c472023-03-21 09:34:18 +0800202 device ref cnvi_wifi on
203 chip drivers/wifi/generic
204 register "wake" = "GPE0_PME_B0"
205 register "enable_cnvi_ddr_rfim" = "true"
Dtrain Hsu7a759082023-05-26 16:57:48 +0800206 register "add_acpi_dma_property" = "true"
Van Chendea2c472023-03-21 09:34:18 +0800207 device generic 0 on end
208 end
209 end
210 device ref i2c1 on
211 chip drivers/i2c/hid
212 register "generic.hid" = ""WDHT0002""
213 register "generic.desc" = ""WDT Touchscreen""
214 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
215 register "generic.detect" = "1"
216 register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
217 register "generic.reset_delay_ms" = "20"
218 register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
219 register "generic.stop_delay_ms" = "130"
220 register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
221 register "generic.enable_delay_ms" = "1"
222 register "generic.has_power_resource" = "1"
223 register "hid_desc_reg_offset" = "0x20"
Dtrain Hsua6d337b2023-05-18 17:28:42 +0800224 device i2c 2c on
225 probe TOUCHSCREEN TOUCHSCREEN_UNKNOWN
226 probe TOUCHSCREEN TOUCHSCREEN_WDT8752A
227 end
Van Chendea2c472023-03-21 09:34:18 +0800228 end
229 chip drivers/i2c/generic
230 register "hid" = ""ELAN0001""
231 register "desc" = ""ELAN Touchscreen""
232 register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
233 register "detect" = "1"
234 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
235 register "reset_delay_ms" = "20"
236 register "reset_off_delay_ms" = "2"
237 register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
238 register "stop_delay_ms" = "280"
239 register "stop_off_delay_ms" = "2"
240 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
241 register "enable_delay_ms" = "1"
242 register "has_power_resource" = "1"
Dtrain Hsua6d337b2023-05-18 17:28:42 +0800243 device i2c 10 on
244 probe TOUCHSCREEN TOUCHSCREEN_UNKNOWN
245 probe TOUCHSCREEN TOUCHSCREEN_EKTH5012
246 end
Van Chendea2c472023-03-21 09:34:18 +0800247 end
248 chip drivers/i2c/hid
249 register "generic.hid" = ""ELAN900C""
250 register "generic.desc" = ""ELAN Touchscreen""
251 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
252 register "generic.detect" = "1"
253 register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
Dtrain Hsu7ecc3662023-07-12 11:35:19 +0800254 register "generic.reset_delay_ms" = "6"
Van Chendea2c472023-03-21 09:34:18 +0800255 register "generic.reset_off_delay_ms" = "1"
256 register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
257 register "generic.stop_delay_ms" = "300"
258 register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
259 register "generic.enable_delay_ms" = "6"
260 register "generic.has_power_resource" = "1"
261 register "hid_desc_reg_offset" = "0x01"
Dtrain Hsua6d337b2023-05-18 17:28:42 +0800262 device i2c 16 on
263 probe TOUCHSCREEN TOUCHSCREEN_UNKNOWN
264 probe TOUCHSCREEN TOUCHSCREEN_EKTH7D18
265 end
Van Chendea2c472023-03-21 09:34:18 +0800266 end
267 chip drivers/i2c/hid
268 register "generic.hid" = ""GXTP7996""
269 register "generic.desc" = ""Goodix Touchscreen""
270 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
271 register "generic.detect" = "1"
272 register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
273 register "generic.reset_delay_ms" = "100"
274 register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
Dtrain Hsu77b71cf2023-07-18 14:14:41 +0800275 register "generic.stop_delay_ms" = "200"
Van Chendea2c472023-03-21 09:34:18 +0800276 register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
277 register "generic.enable_delay_ms" = "10"
278 register "generic.has_power_resource" = "1"
279 register "hid_desc_reg_offset" = "0x01"
Dtrain Hsua6d337b2023-05-18 17:28:42 +0800280 device i2c 5d on
281 probe TOUCHSCREEN TOUCHSCREEN_UNKNOWN
282 probe TOUCHSCREEN TOUCHSCREEN_GT7996F
283 end
Van Chendea2c472023-03-21 09:34:18 +0800284 end
285 chip drivers/i2c/hid
286 register "generic.hid" = ""GTCH7502""
287 register "generic.desc" = ""G2TOUCH Touchscreen""
288 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
289 register "generic.detect" = "1"
290 register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
291 register "generic.reset_delay_ms" = "100"
292 register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
293 register "generic.stop_delay_ms" = "30"
294 register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
295 register "generic.enable_delay_ms" = "30"
296 register "generic.has_power_resource" = "1"
297 register "hid_desc_reg_offset" = "0x01"
Dtrain Hsua6d337b2023-05-18 17:28:42 +0800298 device i2c 40 on
299 probe TOUCHSCREEN TOUCHSCREEN_UNKNOWN
300 probe TOUCHSCREEN TOUCHSCREEN_GTCH7502
301 end
Van Chendea2c472023-03-21 09:34:18 +0800302 end
303 end
304 device ref i2c3 on
305 chip drivers/i2c/cs42l42
306 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
307 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B15)"
308 register "ts_inv" = "true"
309 register "ts_dbnc_rise" = "RISE_DEB_1000_MS"
310 register "ts_dbnc_fall" = "FALL_DEB_0_MS"
311 register "btn_det_init_dbnce" = "100"
312 register "btn_det_event_dbnce" = "10"
313 register "bias_lvls[0]" = "15"
314 register "bias_lvls[1]" = "8"
315 register "bias_lvls[2]" = "4"
316 register "bias_lvls[3]" = "1"
317 register "hs_bias_ramp_rate" = "HSBIAS_RAMP_SLOW"
318 register "hs_bias_sense_disable" = "true"
319 device i2c 48 on end
320 end
321 end
322 device ref i2c5 on
323 chip drivers/i2c/generic
324 register "hid" = ""ELAN0000""
325 register "desc" = ""ELAN Touchpad""
326 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
327 register "wake" = "GPE0_DW2_14"
328 register "detect" = "1"
Dtrain Hsu9be583e2023-05-18 17:32:01 +0800329 device i2c 15 on
330 probe TOUCHPAD TOUCHPAD_UNKNOWN
331 probe TOUCHPAD TOUCHPAD_EKT3744
332 end
Van Chendea2c472023-03-21 09:34:18 +0800333 end
334 chip drivers/i2c/hid
335 register "generic.hid" = ""GXTP7863""
336 register "generic.desc" = ""Goodix Touchpad""
337 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F14_IRQ)"
338 register "generic.wake" = "GPE0_DW2_14"
339 register "generic.detect" = "1"
340 register "hid_desc_reg_offset" = "0x20"
Dtrain Hsu9be583e2023-05-18 17:32:01 +0800341 device i2c 2c on
342 probe TOUCHPAD TOUCHPAD_UNKNOWN
343 probe TOUCHPAD TOUCHPAD_GT7863
344 end
Van Chendea2c472023-03-21 09:34:18 +0800345 end
346 end
Dtrain Hsu16592182023-06-05 10:00:41 +0800347 device ref pcie_rp7 off end
Van Chendea2c472023-03-21 09:34:18 +0800348 device ref hda on
349 chip drivers/generic/max98357a
350 register "hid" = ""MX98360A""
351 register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
352 register "sdmode_delay" = "5"
353 device generic 0 on end
354 end
355 end
356 device ref pch_espi on
357 chip ec/google/chromeec
358 use conn0 as mux_conn[0]
359 use conn1 as mux_conn[1]
360 device pnp 0c09.0 on end
361 end
362 end
363 device ref pmc hidden
364 chip drivers/intel/pmc_mux
365 device generic 0 on
366 chip drivers/intel/pmc_mux/conn
367 use usb2_port1 as usb2_port
368 use tcss_usb3_port1 as usb3_port
369 device generic 0 alias conn0 on end
370 end
371 chip drivers/intel/pmc_mux/conn
372 use usb2_port2 as usb2_port
373 use tcss_usb3_port2 as usb3_port
374 device generic 1 alias conn1 on end
375 end
376 end
377 end
378 end
379 device ref tcss_xhci on
380 chip drivers/usb/acpi
381 device ref tcss_root_hub on
382 chip drivers/usb/acpi
383 register "desc" = ""USB3 Type-C Port C0 (MLB)""
384 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
385 register "use_custom_pld" = "true"
386 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
387 device ref tcss_usb3_port1 on end
388 end
389 chip drivers/usb/acpi
390 register "desc" = ""USB3 Type-C Port C1 (DB)""
391 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
392 register "use_custom_pld" = "true"
393 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
394 device ref tcss_usb3_port2 on end
395 end
396 end
397 end
398 end
399 device ref xhci on
400 chip drivers/usb/acpi
401 device ref xhci_root_hub on
402 chip drivers/usb/acpi
403 register "desc" = ""USB2 Type-C Port C0 (MLB)""
404 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
405 register "use_custom_pld" = "true"
406 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
407 device ref usb2_port1 on end
408 end
409 chip drivers/usb/acpi
410 register "desc" = ""USB2 Type-C Port C1 (DB)""
411 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
412 register "use_custom_pld" = "true"
413 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
414 device ref usb2_port2 on end
415 end
416 chip drivers/usb/acpi
417 register "desc" = ""USB2 Type-A Port A0 (MLB)""
418 register "type" = "UPC_TYPE_A"
419 register "use_custom_pld" = "true"
420 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
421 device ref usb2_port3 on end
422 end
423 chip drivers/usb/acpi
424 register "desc" = ""USB2 WWAN""
425 register "type" = "UPC_TYPE_INTERNAL"
Dtrain Hsu764167b2023-05-18 17:34:56 +0800426 device ref usb2_port4 on
427 probe DB_LTE LTE_PRESENT
428 end
Van Chendea2c472023-03-21 09:34:18 +0800429 end
430 chip drivers/usb/acpi
431 register "desc" = ""USB2 User Facing Camera""
432 register "type" = "UPC_TYPE_INTERNAL"
433 device ref usb2_port6 on end
434 end
435 chip drivers/usb/acpi
436 register "desc" = ""USB2 World Facing Camera""
437 register "type" = "UPC_TYPE_INTERNAL"
438 device ref usb2_port7 on end
439 end
440 chip drivers/usb/acpi
441 register "desc" = ""USB2 Bluetooth""
442 register "type" = "UPC_TYPE_INTERNAL"
443 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
444 device ref usb2_port10 on end
445 end
446 chip drivers/usb/acpi
447 register "desc" = ""USB3 Type-A Port A0 (MLB)""
448 register "type" = "UPC_TYPE_USB3_A"
449 register "use_custom_pld" = "true"
450 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
451 device ref usb3_port1 on end
452 end
453 chip drivers/usb/acpi
454 register "desc" = ""USB3 WWAN""
455 register "type" = "UPC_TYPE_INTERNAL"
Dtrain Hsu764167b2023-05-18 17:34:56 +0800456 device ref usb3_port2 on
457 probe DB_LTE LTE_PRESENT
458 end
Van Chendea2c472023-03-21 09:34:18 +0800459 end
460 end
461 end
462 end
van_chene5fa3b12023-03-13 14:57:00 +0800463 end
van_chene5fa3b12023-03-13 14:57:00 +0800464end