blob: ca481ffd623103a1a7d74abdd26c2f3f7b3d93f0 [file] [log] [blame]
Uwe Hermann20a98c92009-06-05 23:02:43 +00001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2009 One Laptop per Child, Association, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#ifdef GETPIR
22#include "pirq_routing.h"
23#else
24#include <arch/pirq_routing.h>
25#endif
26
27const struct irq_routing_table intel_irq_routing_table = {
28 PIRQ_SIGNATURE, /* u32 signature */
29 PIRQ_VERSION, /* u16 version */
30 32+16*14, /* There can be total 14 devices on the bus */
31 0x00, /* Where the interrupt router lies (bus) */
32 (0x11<<3)|0x0, /* Where the interrupt router lies (dev) */
33 0xc20, /* IRQs devoted exclusively to PCI usage */
34 0x1106, /* Vendor */
35 0x8409, /* Device */
36 0, /* Crap (miniport) */
37 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
38 0xc6, /* u8 checksum. This has to be set to some
39 //0xa0?? value that would give 0 after the sum of all
40 bytes for this structure (including checksum) */
41 {
42 /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
43 {0x00,(0x01<<3)|0x0, {{0x01, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},
44 {0x00,(0x08<<3)|0x0, {{0x01, 0xdeb8}, {0x01, 0xdeb8}, {0x01, 0xdeb8}, {0x01, 0x0deb8}}, 0x1, 0x0},
45 {0x00,(0x0b<<3)|0x0, {{0x01, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},
46 {0x00,(0x0c<<3)|0x0, {{0x01, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},
47 {0x00,(0x0d<<3)|0x0, {{0x02, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},
48 {0x00,(0x0e<<3)|0x0, {{0x03, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},
49 {0x00,(0x0f<<3)|0x0, {{0x02, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},
50 {0x00,(0x10<<3)|0x0, {{0x01, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0x0deb8}}, 0x0, 0x0},
51 {0x00,(0x14<<3)|0x0, {{0x02, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},
52 }
53};
54
55inline unsigned long write_pirq_routing_table(unsigned long addr)
56{
57 return copy_pirq_routing_table(addr);
58}