| Dave Frodin | 2093c4f | 2014-06-13 08:12:48 -0600 | [diff] [blame^] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2014 Sage Electronic Engineering, LLC. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | */ |
| 19 | |
| 20 | #ifndef _AMD_FAM15TN_PCI_DEVS_H_ |
| 21 | #define _AMD_FAM15TN_PCI_DEVS_H_ |
| 22 | |
| 23 | #define BUS0 0 |
| 24 | |
| 25 | /* Graphics and Display */ |
| 26 | #define GFX_DEV 0x1 |
| 27 | #define GFX_FUNC 0 |
| 28 | #define GFX_DEVFN PCI_DEVFN(GFX_DEV,GFX_FUNC) |
| 29 | |
| 30 | /* PCIe Ports */ |
| 31 | #define NB_PCIE_PORT1_DEV 0x2 |
| 32 | #define NB_PCIE_PORT2_DEV 0x3 |
| 33 | #define NB_PCIE_PORT3_DEV 0x4 |
| 34 | #define NB_PCIE_PORT4_DEV 0x5 |
| 35 | #define NB_PCIE_PORT5_DEV 0x6 |
| 36 | #define NB_PCIE_PORT6_DEV 0x7 |
| 37 | #define NB_PCIE_PORT7_DEV 0x8 |
| 38 | #define NB_PCIE_FUNC 0 |
| 39 | #define NB_PCIE_PORT1_DEVID 0x1412 |
| 40 | #define NB_PCIE_PORT2_DEVID 0x1413 |
| 41 | #define NB_PCIE_PORT3_DEVID 0x1414 |
| 42 | #define NB_PCIE_PORT4_DEVID 0x1415 |
| 43 | #define NB_PCIE_PORT5_DEVID 0x1416 |
| 44 | #define NB_PCIE_PORT6_DEVID 0x1417 |
| 45 | #define NB_PCIE_PORT7_DEVID 0x1418 |
| 46 | #define NB_PCIE_PORT1_DEVFN PCI_DEVFN(NB_PCIE_PORT1_DEV,NB_PCIE_FUNC) |
| 47 | #define NB_PCIE_PORT2_DEVFN PCI_DEVFN(NB_PCIE_PORT2_DEV,NB_PCIE_FUNC) |
| 48 | #define NB_PCIE_PORT3_DEVFN PCI_DEVFN(NB_PCIE_PORT3_DEV,NB_PCIE_FUNC) |
| 49 | #define NB_PCIE_PORT4_DEVFN PCI_DEVFN(NB_PCIE_PORT4_DEV,NB_PCIE_FUNC) |
| 50 | #define NB_PCIE_PORT5_DEVFN PCI_DEVFN(NB_PCIE_PORT5_DEV,NB_PCIE_FUNC) |
| 51 | #define NB_PCIE_PORT6_DEVFN PCI_DEVFN(NB_PCIE_PORT6_DEV,NB_PCIE_FUNC) |
| 52 | #define NB_PCIE_PORT7_DEVFN PCI_DEVFN(NB_PCIE_PORT7_DEV,NB_PCIE_FUNC) |
| 53 | |
| 54 | #endif /* _AMD_FAM15TN_PCI_DEVS_H_ */ |