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Angel Pons182dbde2020-04-02 23:49:05 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Arthur Heymans7b9c1392017-04-09 20:40:39 +02002
3#include <device/device.h>
4#include <device/pci.h>
Kyösti Mälkkif1b58b72019-03-01 13:43:02 +02005#include <device/pci_ops.h>
Arthur Heymans7b9c1392017-04-09 20:40:39 +02006#include <device/pci_ids.h>
Arthur Heymans349e0852017-04-09 20:48:37 +02007#include "i82801jx.h"
Arthur Heymans7b9c1392017-04-09 20:40:39 +02008
9static void pci_init(struct device *dev)
10{
11 u16 reg16;
12 u8 reg8;
13
14 /* This device has no interrupt */
15 pci_write_config8(dev, PCI_INTERRUPT_LINE, 0xff);
16
17 /* Master Latency Count must be set to 0x04! */
18 reg8 = pci_read_config8(dev, D30F0_SMLT);
19 reg8 &= 0x07;
20 reg8 |= (0x04 << 3);
21 pci_write_config8(dev, D30F0_SMLT, reg8);
22
23 /* Clear errors in status registers */
24 reg16 = pci_read_config16(dev, PCI_STATUS);
25 //reg16 |= 0xf900;
26 pci_write_config16(dev, PCI_STATUS, reg16);
27
28 reg16 = pci_read_config16(dev, PCI_SEC_STATUS);
29 // reg16 |= 0xf900;
30 pci_write_config16(dev, PCI_SEC_STATUS, reg16);
31}
32
Arthur Heymans7b9c1392017-04-09 20:40:39 +020033static struct device_operations device_ops = {
34 .read_resources = pci_bus_read_resources,
35 .set_resources = pci_dev_set_resources,
36 .enable_resources = pci_bus_enable_resources,
37 .init = pci_init,
38 .scan_bus = pci_scan_bridge,
39 .reset_bus = pci_bus_reset,
Angel Pons1fc0edd2020-05-31 00:03:28 +020040 .ops_pci = &pci_dev_ops_pci,
Arthur Heymans7b9c1392017-04-09 20:40:39 +020041};
42
43static const unsigned short pci_device_ids[] = {
Arthur Heymans349e0852017-04-09 20:48:37 +020044 0x244e,
Arthur Heymans7b9c1392017-04-09 20:40:39 +020045 0
46};
47
Arthur Heymans349e0852017-04-09 20:48:37 +020048static const struct pci_driver ich10_pci __pci_driver = {
Arthur Heymans7b9c1392017-04-09 20:40:39 +020049 .ops = &device_ops,
50 .vendor = PCI_VENDOR_ID_INTEL,
51 .devices = pci_device_ids,
52};