Angel Pons | 4b42983 | 2020-04-02 23:48:50 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 2 | |
Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 3 | #include <console/console.h> |
Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 4 | #include <device/device.h> |
| 5 | #include <device/pci.h> |
| 6 | #include <device/pci_ids.h> |
Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 7 | #include <device/pci_ops.h> |
Arthur Heymans | de14ea7 | 2016-09-04 16:01:11 +0200 | [diff] [blame] | 8 | #include <commonlib/helpers.h> |
Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 9 | #include <drivers/intel/gma/intel_bios.h> |
Arthur Heymans | de14ea7 | 2016-09-04 16:01:11 +0200 | [diff] [blame] | 10 | #include <drivers/intel/gma/edid.h> |
Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 11 | #include <drivers/intel/gma/i915.h> |
Patrick Rudolph | f6aa7d9 | 2017-09-29 18:28:23 +0200 | [diff] [blame] | 12 | #include <drivers/intel/gma/opregion.h> |
Nico Huber | f2dd049 | 2017-10-29 15:42:44 +0100 | [diff] [blame] | 13 | #include <drivers/intel/gma/libgfxinit.h> |
Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 14 | #include <pc80/vga.h> |
Elyes HAOUAS | 51401c3 | 2019-05-15 21:09:30 +0200 | [diff] [blame] | 15 | #include <types.h> |
Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 16 | |
Elyes HAOUAS | bf0970e | 2019-03-21 11:10:03 +0100 | [diff] [blame] | 17 | #include "chip.h" |
| 18 | #include "drivers/intel/gma/i915_reg.h" |
| 19 | #include "x4x.h" |
| 20 | |
Arthur Heymans | de14ea7 | 2016-09-04 16:01:11 +0200 | [diff] [blame] | 21 | #define BASE_FREQUENCY 96000 |
| 22 | |
Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 23 | static void gma_func0_init(struct device *dev) |
| 24 | { |
Nico Huber | f2a0be2 | 2020-04-26 17:01:25 +0200 | [diff] [blame] | 25 | intel_gma_init_igd_opregion(); |
| 26 | |
Nico Huber | dd59762 | 2020-04-26 19:46:35 +0200 | [diff] [blame] | 27 | if (!CONFIG(NO_GFX_INIT)) |
| 28 | pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); |
Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 29 | |
Arthur Heymans | de14ea7 | 2016-09-04 16:01:11 +0200 | [diff] [blame] | 30 | /* configure GMBUSFREQ */ |
Nico Huber | 15b83da | 2019-01-12 15:05:20 +0100 | [diff] [blame] | 31 | pci_update_config16(dev, 0xcc, ~0x1ff, 0xbc); |
Arthur Heymans | de14ea7 | 2016-09-04 16:01:11 +0200 | [diff] [blame] | 32 | |
Stefan Tauner | 3e3bae0 | 2018-09-03 19:02:13 +0200 | [diff] [blame] | 33 | int vga_disable = (pci_read_config16(dev, D0F0_GGC) & 2) >> 1; |
Arthur Heymans | 2e7efe6 | 2017-05-06 18:05:57 +0200 | [diff] [blame] | 34 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 35 | if (CONFIG(MAINBOARD_USE_LIBGFXINIT)) { |
Arthur Heymans | e6c8f7e | 2018-08-09 11:31:51 +0200 | [diff] [blame] | 36 | if (vga_disable) { |
| 37 | printk(BIOS_INFO, |
| 38 | "IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n"); |
| 39 | } else { |
| 40 | int lightup_ok; |
| 41 | gma_gfxinit(&lightup_ok); |
| 42 | } |
Arthur Heymans | 2e7efe6 | 2017-05-06 18:05:57 +0200 | [diff] [blame] | 43 | } else { |
Damien Zammit | 216fc50 | 2016-01-22 19:13:18 +1100 | [diff] [blame] | 44 | pci_dev_init(dev); |
Arthur Heymans | 2e7efe6 | 2017-05-06 18:05:57 +0200 | [diff] [blame] | 45 | } |
Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 46 | } |
| 47 | |
Arthur Heymans | c80748c | 2017-02-26 23:04:51 +0100 | [diff] [blame] | 48 | static void gma_func0_disable(struct device *dev) |
| 49 | { |
Kyösti Mälkki | c70eed1 | 2018-05-22 02:18:00 +0300 | [diff] [blame] | 50 | struct device *dev_host = pcidev_on_root(0, 0); |
Arthur Heymans | c80748c | 2017-02-26 23:04:51 +0100 | [diff] [blame] | 51 | u16 ggc; |
| 52 | |
| 53 | ggc = pci_read_config16(dev_host, D0F0_GGC); |
| 54 | ggc |= (1 << 1); /* VGA cycles to discrete GPU */ |
| 55 | pci_write_config16(dev_host, D0F0_GGC, ggc); |
| 56 | } |
| 57 | |
Furquan Shaikh | 7536a39 | 2020-04-24 21:59:21 -0700 | [diff] [blame] | 58 | static void gma_generate_ssdt(const struct device *device) |
Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 59 | { |
Matt DeVillier | 33f89ee | 2020-03-30 22:16:37 -0500 | [diff] [blame] | 60 | const struct northbridge_intel_x4x_config *chip = device->chip_info; |
Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 61 | |
Matt DeVillier | 33f89ee | 2020-03-30 22:16:37 -0500 | [diff] [blame] | 62 | drivers_intel_gma_displays_ssdt_generate(&chip->gfx); |
Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 63 | } |
| 64 | |
Patrick Rudolph | f6aa7d9 | 2017-09-29 18:28:23 +0200 | [diff] [blame] | 65 | static const char *gma_acpi_name(const struct device *dev) |
| 66 | { |
| 67 | return "GFX0"; |
| 68 | } |
| 69 | |
Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 70 | static struct pci_operations gma_pci_ops = { |
Subrata Banik | 4a0f071 | 2019-03-20 14:29:47 +0530 | [diff] [blame] | 71 | .set_subsystem = pci_dev_set_subsystem, |
Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 72 | }; |
| 73 | |
| 74 | static struct device_operations gma_func0_ops = { |
Matt DeVillier | 33f89ee | 2020-03-30 22:16:37 -0500 | [diff] [blame] | 75 | .read_resources = pci_dev_read_resources, |
| 76 | .set_resources = pci_dev_set_resources, |
| 77 | .enable_resources = pci_dev_enable_resources, |
| 78 | .acpi_fill_ssdt = gma_generate_ssdt, |
| 79 | .init = gma_func0_init, |
| 80 | .ops_pci = &gma_pci_ops, |
| 81 | .disable = gma_func0_disable, |
| 82 | .acpi_name = gma_acpi_name, |
Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 83 | }; |
| 84 | |
Arthur Heymans | 70a1dda | 2017-03-09 01:58:24 +0100 | [diff] [blame] | 85 | static const unsigned short pci_device_ids[] = { |
Arthur Heymans | 9e70ce0 | 2016-12-16 15:32:32 +0100 | [diff] [blame] | 86 | 0x2e02, /* Eaglelake */ |
| 87 | 0x2e12, /* Q43/Q45 */ |
| 88 | 0x2e22, /* G43/G45 */ |
| 89 | 0x2e32, /* G41 */ |
| 90 | 0x2e42, /* B43 */ |
| 91 | 0x2e92, /* B43_I */ |
| 92 | 0 |
Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 93 | }; |
| 94 | |
| 95 | static const struct pci_driver gma __pci_driver = { |
| 96 | .ops = &gma_func0_ops, |
| 97 | .vendor = PCI_VENDOR_ID_INTEL, |
| 98 | .devices = pci_device_ids, |
| 99 | }; |