Stefan Reinauer | cc46e73 | 2009-03-13 00:44:09 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2007-2009 coresystems GmbH |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License as |
| 8 | * published by the Free Software Foundation; version 2 of |
| 9 | * the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Stefan Reinauer | cc46e73 | 2009-03-13 00:44:09 +0000 | [diff] [blame] | 15 | */ |
| 16 | |
Patrick Georgi | 334328a | 2012-02-16 19:01:22 +0100 | [diff] [blame] | 17 | #include "hostbridge.asl" |
| 18 | #include "../i945.h" |
Stefan Reinauer | cc46e73 | 2009-03-13 00:44:09 +0000 | [diff] [blame] | 19 | |
Denis 'GNUtoo' Carikli | 4b213a8 | 2013-03-28 14:24:39 +0100 | [diff] [blame] | 20 | /* Operating System Capabilities Method */ |
| 21 | Method (_OSC, 4) |
| 22 | { |
Denis 'GNUtoo' Carikli | 4b213a8 | 2013-03-28 14:24:39 +0100 | [diff] [blame] | 23 | /* Check for proper PCI/PCIe UUID */ |
| 24 | If (LEqual(Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) |
| 25 | { |
| 26 | /* Let OS control everything */ |
| 27 | Return(Arg3) |
| 28 | } Else { |
Marc Jones | 1faa11e | 2018-08-15 22:17:45 -0600 | [diff] [blame^] | 29 | CreateDWordField(Arg3, 0, CDW1) |
Denis 'GNUtoo' Carikli | 4b213a8 | 2013-03-28 14:24:39 +0100 | [diff] [blame] | 30 | Or(CDW1, 4, CDW1) // Unrecognized UUID, so set bit 2 to 1 |
| 31 | Return(Arg3) |
| 32 | } |
| 33 | } |
| 34 | |
Stefan Reinauer | cc46e73 | 2009-03-13 00:44:09 +0000 | [diff] [blame] | 35 | /* PCI Device Resource Consumption */ |
| 36 | Device (PDRC) |
| 37 | { |
| 38 | Name (_HID, EISAID("PNP0C02")) |
| 39 | Name (_UID, 1) |
Stefan Reinauer | 71a3d96 | 2009-07-21 21:44:24 +0000 | [diff] [blame] | 40 | |
| 41 | // This does not seem to work correctly yet - set values statically for |
| 42 | // now. |
Stefan Reinauer | 109ab31 | 2009-08-12 16:08:05 +0000 | [diff] [blame] | 43 | |
Stefan Reinauer | 71a3d96 | 2009-07-21 21:44:24 +0000 | [diff] [blame] | 44 | //Name (PDRS, ResourceTemplate() { |
| 45 | // Memory32Fixed(ReadWrite, 0x00000000, 0x00004000, RCRB) // RCBA |
| 46 | // Memory32Fixed(ReadWrite, 0x00000000, 0x00004000, MCHB) // MCHBAR |
| 47 | // Memory32Fixed(ReadWrite, 0x00000000, 0x00001000, DMIB) // DMIBAR |
| 48 | // Memory32Fixed(ReadWrite, 0x00000000, 0x00001000, EGPB) // EPBAR |
| 49 | // Memory32Fixed(ReadWrite, 0x00000000, 0x00000000, PCIE) // PCIE BAR |
| 50 | // Memory32Fixed(ReadWrite, 0xfed20000, 0x00070000, ICHB) // Misc ICH |
| 51 | //}) |
| 52 | |
Stefan Reinauer | cc46e73 | 2009-03-13 00:44:09 +0000 | [diff] [blame] | 53 | Name (PDRS, ResourceTemplate() { |
Stefan Reinauer | 71a3d96 | 2009-07-21 21:44:24 +0000 | [diff] [blame] | 54 | Memory32Fixed(ReadWrite, 0xfed1c000, 0x00004000) // RCBA |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 55 | Memory32Fixed(ReadWrite, DEFAULT_MCHBAR, 0x00004000) |
| 56 | Memory32Fixed(ReadWrite, DEFAULT_DMIBAR, 0x00001000) |
| 57 | Memory32Fixed(ReadWrite, DEFAULT_EPBAR, 0x00001000) |
| 58 | Memory32Fixed(ReadWrite, DEFAULT_PCIEXBAR, 0x04000000) |
Stefan Reinauer | 71a3d96 | 2009-07-21 21:44:24 +0000 | [diff] [blame] | 59 | Memory32Fixed(ReadWrite, 0xfed20000, 0x00020000) // Misc ICH |
| 60 | Memory32Fixed(ReadWrite, 0xfed40000, 0x00005000) // Misc ICH |
| 61 | Memory32Fixed(ReadWrite, 0xfed45000, 0x0004b000) // Misc ICH |
Stefan Reinauer | cc46e73 | 2009-03-13 00:44:09 +0000 | [diff] [blame] | 62 | }) |
| 63 | |
| 64 | // Current Resource Settings |
| 65 | Method (_CRS, 0, Serialized) |
| 66 | { |
Stefan Reinauer | 71a3d96 | 2009-07-21 21:44:24 +0000 | [diff] [blame] | 67 | //CreateDwordField(PDRS, ^RCRB._BAS, RBR0) |
| 68 | //ShiftLeft(\_SB.PCI0.LPCB.RCBA, 14, RBR0) |
Stefan Reinauer | cc46e73 | 2009-03-13 00:44:09 +0000 | [diff] [blame] | 69 | |
Stefan Reinauer | 71a3d96 | 2009-07-21 21:44:24 +0000 | [diff] [blame] | 70 | //CreateDwordField(PDRS, ^MCHB._BAS, MBR0) |
| 71 | //ShiftLeft(\_SB.PCI0.MCHC.MHBR, 14, MBR0) |
Stefan Reinauer | cc46e73 | 2009-03-13 00:44:09 +0000 | [diff] [blame] | 72 | |
Stefan Reinauer | 71a3d96 | 2009-07-21 21:44:24 +0000 | [diff] [blame] | 73 | //CreateDwordField(PDRS, ^DMIB._BAS, DBR0) |
| 74 | //ShiftLeft(\_SB.PCI0.MCHC.DMBR, 12, DBR0) |
Stefan Reinauer | cc46e73 | 2009-03-13 00:44:09 +0000 | [diff] [blame] | 75 | |
Stefan Reinauer | 71a3d96 | 2009-07-21 21:44:24 +0000 | [diff] [blame] | 76 | //CreateDwordField(PDRS, ^EGPB._BAS, EBR0) |
| 77 | //ShiftLeft(\_SB.PCI0.MCHC.EPBR, 12, EBR0) |
Stefan Reinauer | cc46e73 | 2009-03-13 00:44:09 +0000 | [diff] [blame] | 78 | |
Stefan Reinauer | 71a3d96 | 2009-07-21 21:44:24 +0000 | [diff] [blame] | 79 | //CreateDwordField(PDRS, ^PCIE._BAS, PBR0) |
| 80 | //ShiftLeft(\_SB.PCI0.MCHC.PXBR, 26, PBR0) |
Stefan Reinauer | cc46e73 | 2009-03-13 00:44:09 +0000 | [diff] [blame] | 81 | |
Stefan Reinauer | 71a3d96 | 2009-07-21 21:44:24 +0000 | [diff] [blame] | 82 | //CreateDwordField(PDRS, ^PCIE._LEN, PSZ0) |
| 83 | //ShiftLeft(0x10000000, \_SB.PCI0.MCHC.PXSZ, PSZ0) |
Stefan Reinauer | cc46e73 | 2009-03-13 00:44:09 +0000 | [diff] [blame] | 84 | |
| 85 | Return(PDRS) |
| 86 | } |
| 87 | } |
| 88 | |
| 89 | // PCIe graphics port 0:1.0 |
Patrick Georgi | 334328a | 2012-02-16 19:01:22 +0100 | [diff] [blame] | 90 | #include "peg.asl" |
Stefan Reinauer | cc46e73 | 2009-03-13 00:44:09 +0000 | [diff] [blame] | 91 | |
| 92 | // Integrated graphics 0:2.0 |
Patrick Georgi | 334328a | 2012-02-16 19:01:22 +0100 | [diff] [blame] | 93 | #include "igd.asl" |