blob: ab84c15a94fbf1161585e9220a1c66e40691d076 [file] [log] [blame]
V Sowmyac6d71662021-07-15 08:11:08 +05301/* SPDX-License-Identifier: GPL-2.0-only */
2
3#include <device/pci_ids.h>
4#include <device/pci_ops.h>
5#include <fsp/api.h>
6#include <soc/ramstage.h>
7#include <soc/vr_config.h>
8#include <console/console.h>
9#include <intelblocks/cpulib.h>
10
11/*
12 * VR Configurations for IA and GT domains for ADL-P SKU's.
13 *
14 * +----------------+-----------+-------+-------+---------+-------------+----------+
15 * | SKU | Setting | AC LL | DC LL | ICC MAX | TDC Current | TDC Time |
16 * | | |(mOhms)|(mOhms)| (A) | (A) | (msec) |
17 * +----------------+-----------+-------+-------+---------+-------------+----------+
18 * | ADL-P 682(45W) | IA | 2.3 | 2.3 | 160 | 57 | 28000 |
19 * + +-----------+-------+-------+---------+-------------+----------+
20 * | | GT | 3.2 | 3.2 | 50 | 57 | 28000 |
21 * +----------------+-----------+-------+-------+---------+-------------+----------+
22 * | ADL-P 482(28W) | IA | 2.3 | 2.3 | 109 | 40 | 28000 |
23 * + +-----------+-------+-------+---------+-------------+----------+
24 * | | GT | 3.2 | 3.2 | 50 | 40 | 28000 |
25 * +----------------+-----------+-------+-------+---------+-------------+----------+
26 * | ADL-P 282(15W) | IA | 2.8 | 2.8 | 80 | 20 | 28000 |
27 * + +-----------+-------+-------+---------+-------------+----------+
28 * | | GT | 3.2 | 3.2 | 40 | 20 | 28000 |
29 * +----------------+-----------+-------+-------+---------+-------------+----------+
30 */
31
32struct vr_lookup {
33 uint16_t mchid;
34 uint32_t conf[NUM_VR_DOMAINS];
35};
36
37static uint32_t load_table(const struct vr_lookup *tbl, const int tbl_entries, const int domain,
38 const uint16_t mch_id)
39{
40 for (size_t i = 0; i < tbl_entries; i++) {
41 if (tbl[i].mchid != mch_id)
42 continue;
43 return tbl[i].conf[domain];
44 }
45
46 printk(BIOS_ERR, "ERROR: Unknown MCH (0x%x) in %s\n", mch_id, __func__);
47 return 0;
48}
49
50static const struct vr_lookup vr_config_ll[] = {
51 { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, VR_CFG_ALL_DOMAINS_LOADLINE(2.3, 3.2) },
52 { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, VR_CFG_ALL_DOMAINS_LOADLINE(2.3, 3.2) },
53 { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, VR_CFG_ALL_DOMAINS_LOADLINE(2.8, 3.2) },
54};
55
56static const struct vr_lookup vr_config_icc[] = {
57 { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, VR_CFG_ALL_DOMAINS_ICC(160, 50) },
58 { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, VR_CFG_ALL_DOMAINS_ICC(109, 50) },
59 { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, VR_CFG_ALL_DOMAINS_ICC(80, 40) },
60};
61
62static const struct vr_lookup vr_config_tdc_timewindow[] = {
63 { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) },
64 { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) },
65 { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, VR_CFG_ALL_DOMAINS_TDC(28000, 28000) },
66};
67
68static const struct vr_lookup vr_config_tdc_currentlimit[] = {
69 { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, VR_CFG_ALL_DOMAINS_TDC_CURRENT(57, 57) },
70 { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, VR_CFG_ALL_DOMAINS_TDC_CURRENT(40, 40) },
71 { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, VR_CFG_ALL_DOMAINS_TDC_CURRENT(20, 20) },
72};
73
74void fill_vr_domain_config(FSP_S_CONFIG *s_cfg,
75 int domain, const struct vr_config *chip_cfg)
76{
77 const struct vr_config *cfg;
78
79 if (domain < 0 || domain >= NUM_VR_DOMAINS)
80 return;
81
82 /* Use device tree override if requested */
83 if (chip_cfg->vr_config_enable) {
84 cfg = chip_cfg;
85
86 s_cfg->AcLoadline[domain] = cfg->ac_loadline;
87 s_cfg->DcLoadline[domain] = cfg->dc_loadline;
88 s_cfg->IccMax[domain] = cfg->icc_max;
89 s_cfg->TdcTimeWindow[domain] = cfg->tdc_timewindow;
90 s_cfg->TdcCurrentLimit[domain] = cfg->tdc_currentlimit;
V Sowmyac6d71662021-07-15 08:11:08 +053091 } else {
92 uint16_t mch_id = 0;
93
94 if (!mch_id) {
95 struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT);
96 mch_id = dev ? pci_read_config16(dev, PCI_DEVICE_ID) : 0xffff;
97 }
98
99 s_cfg->AcLoadline[domain] = load_table(vr_config_ll, ARRAY_SIZE(vr_config_ll),
100 domain, mch_id);
101 s_cfg->DcLoadline[domain] = load_table(vr_config_ll, ARRAY_SIZE(vr_config_ll),
102 domain, mch_id);
103 s_cfg->IccMax[domain] = load_table(vr_config_icc, ARRAY_SIZE(vr_config_icc),
104 domain, mch_id);
105 s_cfg->TdcTimeWindow[domain] = load_table(vr_config_tdc_timewindow,
106 ARRAY_SIZE(vr_config_tdc_timewindow),
107 domain, mch_id);
108 s_cfg->TdcCurrentLimit[domain] = load_table(vr_config_tdc_currentlimit,
109 ARRAY_SIZE(vr_config_tdc_currentlimit),
110 domain, mch_id);
Ronak Kanabar1f88a712021-07-15 19:02:22 +0530111 }
112
113 /* Check TdcTimeWindow and TdcCurrentLimit,
114 Set TdcEnable and Set VR TDC Input current to root mean square */
115 if (s_cfg->TdcTimeWindow[domain] != 0 && s_cfg->TdcCurrentLimit[domain] != 0) {
116 s_cfg->TdcEnable[domain] = 1;
117 s_cfg->Irms[domain] = 1;
V Sowmyac6d71662021-07-15 08:11:08 +0530118 }
119}