Angel Pons | ae59387 | 2020-04-04 18:50:57 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 2 | |
Arthur Heymans | 615818f | 2022-05-31 21:33:43 +0200 | [diff] [blame] | 3 | #include <acpi/acpi.h> |
Felix Held | dd2f3fa | 2021-02-08 22:23:54 +0100 | [diff] [blame] | 4 | #include <amdblocks/cpu.h> |
Felix Held | 199b10f | 2022-08-13 00:29:23 +0200 | [diff] [blame] | 5 | #include <amdblocks/iomap.h> |
Felix Held | f1093af | 2021-07-13 23:00:26 +0200 | [diff] [blame] | 6 | #include <amdblocks/mca.h> |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 7 | #include <console/console.h> |
Zheng Bao | 6ba591b | 2020-06-09 09:47:06 +0800 | [diff] [blame] | 8 | #include <cpu/amd/microcode.h> |
Arthur Heymans | 615818f | 2022-05-31 21:33:43 +0200 | [diff] [blame] | 9 | #include <cpu/cpu.h> |
| 10 | #include <cpu/x86/mp.h> |
Arthur Heymans | 615818f | 2022-05-31 21:33:43 +0200 | [diff] [blame] | 11 | #include <cpu/x86/mtrr.h> |
Arthur Heymans | 615818f | 2022-05-31 21:33:43 +0200 | [diff] [blame] | 12 | #include <device/device.h> |
Arthur Heymans | 615818f | 2022-05-31 21:33:43 +0200 | [diff] [blame] | 13 | #include <soc/cpu.h> |
| 14 | #include <soc/iomap.h> |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 15 | |
Felix Held | f142ba5 | 2021-04-22 18:26:43 +0200 | [diff] [blame] | 16 | _Static_assert(CONFIG_MAX_CPUS == 8, "Do not override MAX_CPUS. To reduce the number of " |
| 17 | "available cores, use the downcore_mode and disable_smt devicetree settings instead."); |
| 18 | |
Felix Held | 79f5feb | 2021-04-22 18:49:49 +0200 | [diff] [blame] | 19 | /* MP and SMM loading initialization. */ |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 20 | |
Kyösti Mälkki | 79e12ab | 2020-05-31 09:21:07 +0300 | [diff] [blame] | 21 | void mp_init_cpus(struct bus *cpu_bus) |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 22 | { |
Arthur Heymans | e48dcb7 | 2022-05-31 21:48:15 +0200 | [diff] [blame] | 23 | extern const struct mp_ops amd_mp_ops_with_smm; |
| 24 | if (mp_init_with_smm(cpu_bus, &amd_mp_ops_with_smm) != CB_SUCCESS) |
Felix Held | 28a0a14 | 2021-11-02 17:15:58 +0100 | [diff] [blame] | 25 | die_with_post_code(POST_HW_INIT_FAILURE, |
| 26 | "mp_init_with_smm failed. Halting.\n"); |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 27 | |
Raul E Rangel | 93375f2 | 2020-06-05 15:48:21 -0600 | [diff] [blame] | 28 | /* pre_mp_init made the flash not cacheable. Reset to WP for performance. */ |
Felix Held | 199b10f | 2022-08-13 00:29:23 +0200 | [diff] [blame] | 29 | mtrr_use_temp_range(FLASH_BELOW_4GB_MAPPING_REGION_BASE, |
| 30 | FLASH_BELOW_4GB_MAPPING_REGION_SIZE, MTRR_TYPE_WRPROT); |
Arthur Heymans | a19bc34 | 2022-05-31 21:25:53 +0200 | [diff] [blame] | 31 | |
| 32 | /* SMMINFO only needs to be set up when booting from S5 */ |
| 33 | if (!acpi_is_wakeup_s3()) |
| 34 | apm_control(APM_CNT_SMMINFO); |
| 35 | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 36 | } |
| 37 | |
Marshall Dawson | 34c3056 | 2019-07-16 15:18:00 -0600 | [diff] [blame] | 38 | static void model_17_init(struct device *dev) |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 39 | { |
| 40 | check_mca(); |
Chris Wang | e2497d0 | 2020-08-03 22:36:13 +0800 | [diff] [blame] | 41 | set_cstate_io_addr(); |
Zheng Bao | 6ba591b | 2020-06-09 09:47:06 +0800 | [diff] [blame] | 42 | |
| 43 | amd_update_microcode_from_cbfs(); |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 44 | } |
| 45 | |
| 46 | static struct device_operations cpu_dev_ops = { |
Marshall Dawson | 34c3056 | 2019-07-16 15:18:00 -0600 | [diff] [blame] | 47 | .init = model_17_init, |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 48 | }; |
| 49 | |
| 50 | static struct cpu_device_id cpu_table[] = { |
Felix Held | cf9b069 | 2023-02-06 17:04:54 +0100 | [diff] [blame] | 51 | { X86_VENDOR_AMD, RAVEN1_B0_CPUID, CPUID_ALL_STEPPINGS_MASK }, |
| 52 | { X86_VENDOR_AMD, PICASSO_B0_CPUID, CPUID_ALL_STEPPINGS_MASK }, |
| 53 | { X86_VENDOR_AMD, RAVEN2_A0_CPUID, CPUID_ALL_STEPPINGS_MASK }, |
Felix Held | 1e78165 | 2023-02-08 11:39:16 +0100 | [diff] [blame^] | 54 | CPU_TABLE_END |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 55 | }; |
| 56 | |
Marshall Dawson | 34c3056 | 2019-07-16 15:18:00 -0600 | [diff] [blame] | 57 | static const struct cpu_driver model_17 __cpu_driver = { |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 58 | .ops = &cpu_dev_ops, |
| 59 | .id_table = cpu_table, |
| 60 | }; |