Angel Pons | f23ae0b | 2020-04-02 23:48:12 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Damien Roth | 07a196e | 2016-01-19 20:20:15 -0700 | [diff] [blame] | 2 | |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 3 | #include <device/device.h> |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 4 | #include <cpu/cpu.h> |
| 5 | #include <cpu/x86/mtrr.h> |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 6 | #include <cpu/intel/microcode.h> |
| 7 | #include <cpu/x86/cache.h> |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 8 | |
Edward O'Callaghan | 2c9d2cf | 2014-10-27 23:29:29 +1100 | [diff] [blame] | 9 | static void model_6xx_init(struct device *dev) |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 10 | { |
| 11 | /* Turn on caching if we haven't already */ |
Felix Held | 10796d8 | 2021-10-25 17:52:49 +0200 | [diff] [blame] | 12 | enable_cache(); |
Sven Schnelle | adfbcb79 | 2012-01-10 12:01:43 +0100 | [diff] [blame] | 13 | x86_setup_mtrrs(); |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 14 | x86_mtrr_check(); |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 15 | |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 16 | /* Update the microcode */ |
Alexandru Gagniuc | 2c38f50 | 2013-12-06 23:14:54 -0600 | [diff] [blame] | 17 | intel_update_microcode_from_cbfs(); |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 18 | }; |
| 19 | |
| 20 | static struct device_operations cpu_dev_ops = { |
Eric Biederman | 3566b3d | 2004-10-27 01:18:16 +0000 | [diff] [blame] | 21 | .init = model_6xx_init, |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 22 | }; |
Uwe Hermann | cc0dc7f | 2010-10-04 20:43:55 +0000 | [diff] [blame] | 23 | |
| 24 | /* |
| 25 | * Intel Pentium Pro Processor Specification Update |
| 26 | * http://download.intel.com/design/archives/processors/pro/docs/24268935.pdf |
| 27 | * |
| 28 | * Intel Pentium II Processor Specification Update |
| 29 | * http://download.intel.com/design/PentiumII/specupdt/24333749.pdf |
| 30 | * |
| 31 | * Mobile Intel Pentium II Processor Specification Update |
| 32 | * http://download.intel.com/design/intarch/specupdt/24388757.pdf |
| 33 | * |
| 34 | * Intel Celeron Processor Identification Information |
| 35 | * http://www.intel.com/design/celeron/qit/update.pdf |
| 36 | * |
| 37 | * Intel Pentium II Xeon Processor Specification Update |
| 38 | * http://download.intel.com/support/processors/pentiumii/xeon/24377632.pdf |
| 39 | * |
| 40 | * Intel Pentium III Processor Identification and Package Information |
| 41 | * http://www.intel.com/design/pentiumiii/qit/update.pdf |
| 42 | * |
| 43 | * Intel Pentium III Processor Specification Update |
| 44 | * http://download.intel.com/design/intarch/specupdt/24445358.pdf |
| 45 | * |
| 46 | * Mobile Intel Pentium III/III-M Processor Specification Update |
| 47 | * http://download.intel.com/design/intarch/specupdt/24530663.pdf |
| 48 | */ |
Jonathan Neuschäfer | 8f06ce3 | 2017-11-20 01:56:44 +0100 | [diff] [blame] | 49 | static const struct cpu_device_id cpu_table[] = { |
Felix Held | 6a6ac1e | 2023-02-06 15:19:11 +0100 | [diff] [blame] | 50 | { X86_VENDOR_INTEL, 0x0611, CPUID_EXACT_MATCH_MASK }, /* Pentium Pro, B0 */ |
| 51 | { X86_VENDOR_INTEL, 0x0612, CPUID_EXACT_MATCH_MASK }, /* Pentium Pro, C0 */ |
| 52 | { X86_VENDOR_INTEL, 0x0616, CPUID_EXACT_MATCH_MASK }, /* Pentium Pro, sA0 */ |
| 53 | { X86_VENDOR_INTEL, 0x0617, CPUID_EXACT_MATCH_MASK }, /* Pentium Pro, sA1 */ |
| 54 | { X86_VENDOR_INTEL, 0x0619, CPUID_EXACT_MATCH_MASK }, /* Pentium Pro, sB1 */ |
Uwe Hermann | cc0dc7f | 2010-10-04 20:43:55 +0000 | [diff] [blame] | 55 | |
Felix Held | 6a6ac1e | 2023-02-06 15:19:11 +0100 | [diff] [blame] | 56 | { X86_VENDOR_INTEL, 0x0633, CPUID_EXACT_MATCH_MASK }, /* PII, C0 */ |
| 57 | { X86_VENDOR_INTEL, 0x0634, CPUID_EXACT_MATCH_MASK }, /* PII, C1 */ |
Uwe Hermann | cc0dc7f | 2010-10-04 20:43:55 +0000 | [diff] [blame] | 58 | |
Felix Held | 6a6ac1e | 2023-02-06 15:19:11 +0100 | [diff] [blame] | 59 | { X86_VENDOR_INTEL, 0x0660, CPUID_EXACT_MATCH_MASK }, /* Celeron, A0 */ |
| 60 | { X86_VENDOR_INTEL, 0x0665, CPUID_EXACT_MATCH_MASK }, /* Celeron, B0 */ |
| 61 | { X86_VENDOR_INTEL, 0x066a, CPUID_EXACT_MATCH_MASK }, /* PII, mdxA0/dmmA0 + others */ |
Uwe Hermann | cc0dc7f | 2010-10-04 20:43:55 +0000 | [diff] [blame] | 62 | |
Felix Held | 6a6ac1e | 2023-02-06 15:19:11 +0100 | [diff] [blame] | 63 | { X86_VENDOR_INTEL, 0x0680, CPUID_EXACT_MATCH_MASK }, |
| 64 | /* PIII, cA2/cA2c/A2/BA2/PA2/MA2 */ |
| 65 | { X86_VENDOR_INTEL, 0x0681, CPUID_EXACT_MATCH_MASK }, |
| 66 | /* PIII/Celeron, cB0/cB0c/B0/BB0/PB0/MB0*/ |
| 67 | { X86_VENDOR_INTEL, 0x0683, CPUID_EXACT_MATCH_MASK }, |
| 68 | /* PIII/Celeron, cC0/C0/BC0/PC0/MC0 */ |
| 69 | { X86_VENDOR_INTEL, 0x0686, CPUID_EXACT_MATCH_MASK }, |
| 70 | /* PIII/Celeron, cD0/D0/BD0/PD0 */ |
| 71 | { X86_VENDOR_INTEL, 0x068a, CPUID_EXACT_MATCH_MASK }, |
Uwe Hermann | cc0dc7f | 2010-10-04 20:43:55 +0000 | [diff] [blame] | 72 | |
Felix Held | 6a6ac1e | 2023-02-06 15:19:11 +0100 | [diff] [blame] | 73 | { X86_VENDOR_INTEL, 0x06a0, CPUID_EXACT_MATCH_MASK }, /* PIII, A0 */ |
| 74 | { X86_VENDOR_INTEL, 0x06a1, CPUID_EXACT_MATCH_MASK }, /* PIII, A1 */ |
| 75 | { X86_VENDOR_INTEL, 0x06a4, CPUID_EXACT_MATCH_MASK }, /* PIII, B0 */ |
Felix Held | 1e78165 | 2023-02-08 11:39:16 +0100 | [diff] [blame^] | 76 | CPU_TABLE_END |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 77 | }; |
| 78 | |
Stefan Reinauer | 124e4a4 | 2007-10-24 11:10:21 +0000 | [diff] [blame] | 79 | static const struct cpu_driver driver __cpu_driver = { |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 80 | .ops = &cpu_dev_ops, |
| 81 | .id_table = cpu_table, |
| 82 | }; |