| Martin Roth | 8c97450 | 2022-11-20 17:56:44 -0700 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| 3 | #ifndef SOC_INTEL_COMMON_BLOCK_POST_CODES_H |
| 4 | #define SOC_INTEL_COMMON_BLOCK_POST_CODES_H |
| 5 | |
| 6 | /* common/block/cpu/car/cache_as_ram.s */ |
| Yuchen He | 1e67adb | 2023-07-25 21:28:36 +0200 | [diff] [blame^] | 7 | #define POSTCODE_BOOTBLOCK_PRE_C_ENTRY 0x20 |
| 8 | #define POSTCODE_SOC_NO_RESET 0x21 |
| 9 | #define POSTCODE_SOC_CLEAR_FIXED_MTRRS 0x22 |
| 10 | #define POSTCODE_SOC_CLEAR_VAR_MTRRS 0x23 |
| 11 | #define POSTCODE_SOC_SET_UP_CAR_MTRRS 0x24 |
| 12 | #define POSTCODE_SOC_BOOTGUARD_SETUP 0x25 |
| 13 | #define POSTCODE_SOC_CLEARING_CAR 0x26 |
| 14 | #define POSTCODE_SOC_DISABLE_CACHE_EVICT 0x27 |
| 15 | #define POSTCODE_SOC_CAR_NEM_ENHANCED 0x28 |
| 16 | #define POSTCODE_SOC_CAR_INIT_DONE 0x29 |
| 17 | #define POSTCODE_SOC_BEFORE_CARSTAGE 0x2a |
| Martin Roth | 8c97450 | 2022-11-20 17:56:44 -0700 | [diff] [blame] | 18 | |
| Martin Roth | 8c97450 | 2022-11-20 17:56:44 -0700 | [diff] [blame] | 19 | /* common/block/cse/cse.c */ |
| Yuchen He | 1e67adb | 2023-07-25 21:28:36 +0200 | [diff] [blame^] | 20 | #define POSTCODE_CODE_ZERO 0x00 |
| Martin Roth | 8c97450 | 2022-11-20 17:56:44 -0700 | [diff] [blame] | 21 | #endif |