blob: c6e8092ed31d140011c8022bd3523b9d732eeccf [file] [log] [blame]
Eric Biederman6aa31cc2003-06-10 21:22:07 +00001void outb(unsigned char value, unsigned short port)
2{
3 __builtin_outb(value, port);
4}
5
6unsigned char inb(unsigned short port)
7{
8 return __builtin_inb(port);
9}
10
11/* Base Address */
Stefan Reinauer08670622009-06-30 15:17:49 +000012#ifndef CONFIG_TTYS0_BASE
13#define CONFIG_TTYS0_BASE 0x3f8
Eric Biederman6aa31cc2003-06-10 21:22:07 +000014#endif
15
Stefan Reinauer08670622009-06-30 15:17:49 +000016#ifndef CONFIG_TTYS0_BAUD
17#define CONFIG_TTYS0_BAUD 115200
Eric Biederman6aa31cc2003-06-10 21:22:07 +000018#endif
19
Stefan Reinauer08670622009-06-30 15:17:49 +000020#if ((115200%CONFIG_TTYS0_BAUD) != 0)
Eric Biederman6aa31cc2003-06-10 21:22:07 +000021#error Bad ttys0 baud rate
22#endif
23
Stefan Reinauer08670622009-06-30 15:17:49 +000024#if CONFIG_TTYS0_BAUD == 115200
25#define CONFIG_TTYS0_DIV (1)
Eric Biederman6aa31cc2003-06-10 21:22:07 +000026#else
Stefan Reinauer08670622009-06-30 15:17:49 +000027#define CONFIG_TTYS0_DIV (115200/CONFIG_TTYS0_BAUD)
Eric Biederman6aa31cc2003-06-10 21:22:07 +000028#endif
29
30/* Line Control Settings */
Stefan Reinauer08670622009-06-30 15:17:49 +000031#ifndef CONFIG_TTYS0_LCS
Eric Biederman6aa31cc2003-06-10 21:22:07 +000032/* Set 8bit, 1 stop bit, no parity */
Stefan Reinauer08670622009-06-30 15:17:49 +000033#define CONFIG_TTYS0_LCS 0x3
Eric Biederman6aa31cc2003-06-10 21:22:07 +000034#endif
35
Stefan Reinauer08670622009-06-30 15:17:49 +000036#define UART_LCS CONFIG_TTYS0_LCS
Eric Biederman6aa31cc2003-06-10 21:22:07 +000037
38/* Data */
39#define UART_RBR 0x00
40#define UART_TBR 0x00
41
42/* Control */
43#define UART_IER 0x01
44#define UART_IIR 0x02
45#define UART_FCR 0x02
46#define UART_LCR 0x03
47#define UART_MCR 0x04
48#define UART_DLL 0x00
49#define UART_DLM 0x01
50
51/* Status */
52#define UART_LSR 0x05
53#define UART_MSR 0x06
54#define UART_SCR 0x07
55
56int uart_can_tx_byte(void)
57{
Stefan Reinauer08670622009-06-30 15:17:49 +000058 return inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x20;
Eric Biederman6aa31cc2003-06-10 21:22:07 +000059}
60
61void uart_wait_to_tx_byte(void)
62{
63 while(!uart_can_tx_byte())
64 ;
65}
66
67void uart_wait_until_sent(void)
68{
Stefan Reinauer14e22772010-04-27 06:56:47 +000069 while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
Eric Biederman6aa31cc2003-06-10 21:22:07 +000070 ;
71}
72
73static void uart_tx_byte(unsigned char data)
74{
75 uart_wait_to_tx_byte();
Stefan Reinauer08670622009-06-30 15:17:49 +000076 outb(data, CONFIG_TTYS0_BASE + UART_TBR);
Eric Biederman6aa31cc2003-06-10 21:22:07 +000077 /* Make certain the data clears the fifos */
78 uart_wait_until_sent();
79}
80
81
82void uart_init(void)
83{
84 /* disable interrupts */
Stefan Reinauer08670622009-06-30 15:17:49 +000085 outb(0x0, CONFIG_TTYS0_BASE + UART_IER);
Eric Biederman6aa31cc2003-06-10 21:22:07 +000086 /* enable fifo's */
Stefan Reinauer08670622009-06-30 15:17:49 +000087 outb(0x01, CONFIG_TTYS0_BASE + UART_FCR);
Eric Biederman6aa31cc2003-06-10 21:22:07 +000088 /* Set Baud Rate Divisor to 12 ==> 115200 Baud */
Stefan Reinauer08670622009-06-30 15:17:49 +000089 outb(0x80 | UART_LCS, CONFIG_TTYS0_BASE + UART_LCR);
90 outb(CONFIG_TTYS0_DIV & 0xFF, CONFIG_TTYS0_BASE + UART_DLL);
91 outb((CONFIG_TTYS0_DIV >> 8) & 0xFF, CONFIG_TTYS0_BASE + UART_DLM);
92 outb(UART_LCS, CONFIG_TTYS0_BASE + UART_LCR);
Eric Biederman6aa31cc2003-06-10 21:22:07 +000093}
94
95
96void __console_tx_char(unsigned char byte)
97{
98 uart_tx_byte(byte);
Stefan Reinauer14e22772010-04-27 06:56:47 +000099
Eric Biederman6aa31cc2003-06-10 21:22:07 +0000100}
101
102void __console_tx_string(char *str)
103{
104 unsigned char ch;
105 while((ch = *str++) != '\0') {
106 __console_tx_char(ch);
107 }
108}
109
110
111void print_debug_char(unsigned char byte) { __console_tx_char(byte); }
112void print_debug(char *str) { __console_tx_string(str); }
113
114void main(void)
115{
116 static const char msg[] = "hello world\r\n";
117 uart_init();
118#if 0
119 print_debug(msg);
120#endif
121#if 1
122 print_debug("hello world\r\n");
123#endif
124 while(1) {
125 ;
126 }
127}