| Damien Zammit | 0685322 | 2016-11-16 21:06:54 +1100 | [diff] [blame] | 1 | # ITE IT8718F SuperIO EC registers |
| 2 | { |
| 3 | # 00 Configuration register |
| 4 | "conf00_start" : 1, |
| 5 | "conf00_smien" : 1, |
| 6 | "conf00_irqen" : 1, |
| 7 | "conf00_irqclr" : 1, |
| 8 | "conf00_ro_one" : 1, |
| 9 | "conf00_copen" : 1, |
| 10 | "conf00_vbat" : 1, |
| 11 | "conf00_initreset" : 1, |
| 12 | |
| 13 | # 01 Interrupt Status register 1 |
| 14 | "irq1_maxfantac1" : 1, |
| 15 | "irq1_maxfantac2" : 1, |
| 16 | "irq1_maxfantac3" : 1, |
| 17 | "irq1_maxfantac4" : 1, |
| 18 | "irq1_copen" : 1, |
| 19 | "irq1_reserved0" : 1, |
| 20 | "irq1_maxfantac5" : 1, |
| 21 | "irq1_reserved1" : 1, |
| 22 | |
| 23 | # 02 Interrupt Status register 2 |
| 24 | "irq2_limit_vin"[8] : 1, |
| 25 | |
| 26 | # 03 Interrupt Status register 3 |
| 27 | "irq3_limit_temp1" : 1, |
| 28 | "irq3_limit_temp2" : 1, |
| 29 | "irq3_limit_temp3" : 1, |
| 30 | "irq3_reserved" : 5, |
| 31 | |
| 32 | # 04 SMI Mask register 1 |
| 33 | "smi1_dis_fantac1" : 1, |
| 34 | "smi1_dis_fantac2" : 1, |
| 35 | "smi1_dis_fantac3" : 1, |
| 36 | "smi1_dis_fantac4" : 1, |
| 37 | "smi1_dis_copen" : 1, |
| 38 | "smi1_reserved0" : 1, |
| 39 | "smi1_dis_fantac5" : 1, |
| 40 | "smi1_reserved1" : 1, |
| 41 | |
| 42 | # 05 SMI Mask register 2 |
| 43 | "smi2_dis_vin"[8] : 1, |
| 44 | |
| 45 | # 06 SMI Mask register 3 |
| 46 | "smi3_dis_temp1" : 1, |
| 47 | "smi3_dis_temp2" : 1, |
| 48 | "smi3_dis_temp3" : 1, |
| 49 | "smi3_reserved" : 5, |
| 50 | |
| 51 | # 07 Interrupt Mask register 1 |
| 52 | "irqmask1_fantac1" : 1, |
| 53 | "irqmask1_fantac2" : 1, |
| 54 | "irqmask1_fantac3" : 1, |
| 55 | "irqmask1_fantac4" : 1, |
| 56 | "irqmask1_copen" : 1, |
| 57 | "irqmask1_reserved0" : 1, |
| 58 | "irqmask1_fantac5" : 1, |
| 59 | "irqmask1_reserved1" : 1, |
| 60 | |
| 61 | # 08 Interrupt Mask register 2 |
| 62 | "irqmask2_vin"[8] : 1, |
| 63 | |
| 64 | # 09 Interrupt Mask register 3 |
| 65 | "irqmask3_temp1" : 1, |
| 66 | "irqmask3_temp2" : 1, |
| 67 | "irqmask3_temp3" : 1, |
| 68 | "irqmask3_reserved" : 4, |
| 69 | "irqmask3_extsensor" : 1, |
| 70 | |
| 71 | # 0a Interface Selection register |
| 72 | "iface_reserved" : 4, |
| 73 | "iface_extsensor_select": 3, |
| 74 | "iface_pseudo_eoc" : 1, |
| 75 | |
| 76 | # 0b Fan PWM smoothing step selection reg |
| 77 | "fanpwm_reserved" : 6, |
| 78 | "fanpwm_smoothing_step" : 2, |
| 79 | |
| 80 | # 0c Fan Tachometer 16 bit enable register |
| 81 | "fantach16_en_tac1" : 1, |
| 82 | "fantach16_en_tac2" : 1, |
| 83 | "fantach16_en_tac3" : 1, |
| 84 | "fantach16_tmpin1_enh" : 1, |
| 85 | "fantach16_en_tac4" : 1, |
| 86 | "fantach16_en_tac5" : 1, |
| 87 | "fantach16_tmpin2_enh" : 1, |
| 88 | "fantach16_tmpin3_enh" : 1, |
| 89 | |
| 90 | # 0d-0f Fan Tachmometer read registers |
| 91 | "fantach_lo_counts1" : 8, |
| 92 | "fantach_lo_counts2" : 8, |
| 93 | "fantach_lo_counts3" : 8, |
| 94 | |
| 95 | # 10-12 Fan Tachometer limit registers |
| 96 | "fantach_lo_limit1" : 8, |
| 97 | "fantach_lo_limit2" : 8, |
| 98 | "fantach_lo_limit3" : 8, |
| 99 | |
| 100 | # 13 Fan controller main control register |
| 101 | "fanctlmain_mode1" : 1, |
| 102 | "fanctlmain_mode2" : 1, |
| 103 | "fanctlmain_mode3" : 1, |
| 104 | "fanctlmain_reserved0" : 1, |
| 105 | "fanctlmain_en_tac1" : 1, |
| 106 | "fanctlmain_en_tac2" : 1, |
| 107 | "fanctlmain_en_tac3" : 1, |
| 108 | "fanctlmain_reserved1" : 1, |
| 109 | |
| 110 | # 14 FAN_CTL control register |
| 111 | "fanctl_enable1" : 1, |
| 112 | "fanctl_enable2" : 1, |
| 113 | "fanctl_enable3" : 1, |
| 114 | "fanctl_minduty_sel" : 1, |
| 115 | # 000: 48Mhz (PWM Frequency 375Khz) |
| 116 | # 001: 24Mhz (PWM Frequency 187.5Khz) |
| 117 | # 010: 12Mhz (PWM Frequency 93.75Khz) |
| 118 | # 011: 8Mhz (PWM Frequency 62.5Khz) |
| 119 | # 100: 6Mhz (PWM Frequency 46.875Khz) |
| 120 | # 101: 3Mhz (PWM Frequency 23.43Khz) |
| 121 | # 110: 1.5Mhz (PWM Frequency 11.7Khz) |
| 122 | # 111: 0.75Mhz (PWM Frequency 5.86Khz) |
| 123 | "fanctl_pwm_base_clock" : 3, |
| 124 | "fanctl_allpolarity" : 1, |
| 125 | |
| 126 | # 15 FAN_CTL1 PWM control register |
| 127 | "fanctl1_tmpin_sel" : 2, |
| 128 | "fanctl1_steps" : 5, |
| 129 | "fanctl1_pwm_mode" : 1, |
| 130 | |
| 131 | # 16 FAN_CTL2 PWM control register |
| 132 | "fanctl2_tmpin_sel" : 2, |
| 133 | "fanctl2_steps" : 5, |
| 134 | "fanctl2_pwm_mode" : 1, |
| 135 | |
| 136 | # 17 FAN_CTL3 PWM control register |
| 137 | "fanctl3_tmpin_sel" : 2, |
| 138 | "fanctl3_steps" : 5, |
| 139 | "fanctl3_pwm_mode" : 1, |
| 140 | |
| 141 | # 18-1a Fan Tachometer extended read registers |
| 142 | "fantach_hi_counts1" : 8, |
| 143 | "fantach_hi_counts2" : 8, |
| 144 | "fantach_hi_counts3" : 8, |
| 145 | |
| 146 | # 1b-1d Fan Tachometer extended limit registers |
| 147 | "fantach_hi_limit1" : 8, |
| 148 | "fantach_hi_limit2" : 8, |
| 149 | "fantach_hi_limit3" : 8, |
| 150 | |
| 151 | "reserved1e" : 8, |
| 152 | "reserved1f" : 8, |
| 153 | |
| 154 | |
| 155 | # 20-27 Reading registers |
| 156 | "vin"[8] : 8, |
| 157 | |
| 158 | "vbat" : 8, |
| 159 | "tmpin1" : 8, |
| 160 | "tmpin2" : 8, |
| 161 | "tmpin3" : 8, |
| 162 | "reserved2c" : 8, |
| 163 | "reserved2d" : 8, |
| 164 | "reserved2e" : 8, |
| 165 | "reserved2f" : 8, |
| 166 | "limit_hi_vin0" : 8, |
| 167 | "limit_lo_vin0" : 8, |
| 168 | "limit_hi_vin1" : 8, |
| 169 | "limit_lo_vin1" : 8, |
| 170 | "limit_hi_vin2" : 8, |
| 171 | "limit_lo_vin2" : 8, |
| 172 | "limit_hi_vin3" : 8, |
| 173 | "limit_lo_vin3" : 8, |
| 174 | "limit_hi_vin4" : 8, |
| 175 | "limit_lo_vin4" : 8, |
| 176 | "limit_hi_vin5" : 8, |
| 177 | "limit_lo_vin5" : 8, |
| 178 | "limit_hi_vin6" : 8, |
| 179 | "limit_lo_vin6" : 8, |
| 180 | "limit_hi_vin7" : 8, |
| 181 | "limit_lo_vin7" : 8, |
| 182 | "limit_hi_tmpin1" : 8, |
| 183 | "limit_lo_tmpin1" : 8, |
| 184 | "limit_hi_tmpin2" : 8, |
| 185 | "limit_lo_tmpin2" : 8, |
| 186 | "limit_hi_tmpin3" : 8, |
| 187 | "limit_lo_tmpin3" : 8, |
| 188 | |
| 189 | "reserved46" : 8, |
| 190 | "reserved47" : 8, |
| 191 | "reserved48" : 8, |
| 192 | "reserved49" : 8, |
| 193 | "reserved4a" : 8, |
| 194 | "reserved4b" : 8, |
| 195 | "reserved4c" : 8, |
| 196 | "reserved4d" : 8, |
| 197 | "reserved4e" : 8, |
| 198 | "reserved4f" : 8, |
| 199 | |
| 200 | # 50 ADC Voltage channel enable register |
| 201 | "adc_scan_enable_vin"[8]: 1, |
| 202 | |
| 203 | # 51 ADC Temperature channel enable register |
| 204 | "therm_diode_tmpin1" : 1, |
| 205 | "therm_diode_tmpin2" : 1, |
| 206 | "therm_diode_tmpin3" : 1, |
| 207 | # Mututally exclusive settings |
| 208 | "therm_resistor_tmpin1" : 1, |
| 209 | "therm_resistor_tmpin2" : 1, |
| 210 | "therm_resistor_tmpin3" : 1, |
| 211 | "therm_reserved" : 2, |
| 212 | |
| 213 | "therm_limit_tmpin1" : 8, |
| 214 | "therm_limit_tmpin2" : 8, |
| 215 | "therm_limit_tmpin3" : 8, |
| 216 | |
| 217 | # 55 Temperature extra channel enable reg |
| 218 | "therm_resistor_vin4" : 1, |
| 219 | "therm_resistor_vin5" : 1, |
| 220 | "therm_resistor_vin6" : 1, |
| 221 | "adc_fanctl2_pwm_duty" : 1, |
| 222 | # 000: 48Mhz (PWM Frequency 375Khz) |
| 223 | # 001: 24Mhz (PWM Frequency 187.5Khz) |
| 224 | # 010: 12Mhz (PWM Frequency 93.75Khz) |
| 225 | # 011: 8Mhz (PWM Frequency 62.5Khz) |
| 226 | # 100: 6Mhz (PWM Frequency 46.875Khz) |
| 227 | # 101: 3Mhz (PWM Frequency 23.43Khz) |
| 228 | # 110: 1.5Mhz (PWM Frequency 11.7Khz) |
| 229 | # 111: 0.75Mhz (PWM Frequency 5.86Khz) |
| 230 | "adc_fanctl2_pwm_bclk" : 3, |
| 231 | "adc_tmpin3_ext_select" : 1, |
| 232 | |
| 233 | "thermal_zero_diode1" : 8, |
| 234 | "thermal_zero_diode2" : 8, |
| 235 | "ite_vendor_id" : 8, |
| 236 | "thermal_zero_diode3" : 8, |
| 237 | "reserved5a" : 8, |
| 238 | "ite_code_id" : 8, |
| 239 | |
| 240 | "beep_fantac" : 1, |
| 241 | "beep_vin" : 1, |
| 242 | "beep_tmpin" : 1, |
| 243 | "beep_reserved" : 1, |
| 244 | # ADC clock select |
| 245 | # 000: 500Khz (Default) |
| 246 | # 001: 250Khz |
| 247 | # 010: 125K |
| 248 | # 011: 62.5Khz |
| 249 | # 100: 31.25Khz |
| 250 | # 101: 24Mhz |
| 251 | # 110: 1Mhz |
| 252 | # 111: 2Mhz |
| 253 | "adc_clock_select" : 3, |
| 254 | "thermal_zero_adj_en" : 1, |
| 255 | |
| 256 | "beep_fan_freq_div" : 4, |
| 257 | "beep_fan_tone_div" : 4, |
| 258 | "beep_volt_freq_div" : 4, |
| 259 | "beep_volt_tone_div" : 4, |
| 260 | "beep_temp_freq_div" : 4, |
| 261 | "beep_temp_tone_div" : 4, |
| 262 | |
| 263 | # 60 SmartGuardian registers |
| 264 | "sguard1_temp_lim_off" : 8, |
| 265 | "sguard1_temp_lim_fan" : 8, |
| 266 | "reserved62" : 8, |
| 267 | "sguard1_pwm_start" : 7, |
| 268 | "sguard1_pwm_slope6" : 1, |
| 269 | "sguard1_pwm_slope05" : 6, |
| 270 | "sguard1_pwm_reserved" : 1, |
| 271 | "sguard1_fan_smooth_en" : 1, |
| 272 | "sguard1_temp_interval" : 5, |
| 273 | "sguard1_temp_reserved" : 2, |
| 274 | "sguard1_temp_pwm_lin" : 1, |
| 275 | "reserved66" : 8, |
| 276 | "reserved67" : 8, |
| 277 | "sguard2_temp_lim_off" : 8, |
| 278 | "sguard2_temp_lim_fan" : 8, |
| 279 | "reserved6a" : 8, |
| 280 | "sguard2_pwm_start" : 7, |
| 281 | "sguard2_pwm_slope6" : 1, |
| 282 | "sguard2_pwm_slope05" : 6, |
| 283 | "sguard2_pwm_reserved" : 1, |
| 284 | "sguard2_fan_smooth_en" : 1, |
| 285 | "sguard2_temp_interval" : 5, |
| 286 | "sguard2_temp_reserved" : 2, |
| 287 | "sguard2_temp_pwm_lin" : 1, |
| 288 | "reserved6e" : 8, |
| 289 | "reserved6f" : 8, |
| 290 | "sguard3_temp_lim_off" : 8, |
| 291 | "sguard3_temp_lim_fan" : 8, |
| 292 | "reserved72" : 8, |
| 293 | "sguard3_pwm_start" : 7, |
| 294 | "sguard3_pwm_slope6" : 1, |
| 295 | "sguard3_pwm_slope05" : 6, |
| 296 | "sguard3_pwm_reserved" : 1, |
| 297 | "sguard3_fan_smooth_en" : 1, |
| 298 | "sguard3_temp_interval" : 5, |
| 299 | "sguard3_temp_reserved" : 2, |
| 300 | "sguard3_temp_pwm_lin" : 1, |
| 301 | "reserved76" : 8, |
| 302 | "reserved77" : 8, |
| 303 | "reserved78" : 8, |
| 304 | "reserved79" : 8, |
| 305 | "reserved7a" : 8, |
| 306 | "reserved7b" : 8, |
| 307 | "reserved7c" : 8, |
| 308 | "reserved7d" : 8, |
| 309 | "reserved7e" : 8, |
| 310 | "reserved7f" : 8, |
| 311 | |
| 312 | # 80 Fan Tachometer 4-5 read registers |
| 313 | "fantach_lo_counts4" : 8, |
| 314 | "fantach_hi_counts4" : 8, |
| 315 | "fantach_lo_counts5" : 8, |
| 316 | "fantach_hi_counts5" : 8, |
| 317 | "fantach_lo_limit4" : 8, |
| 318 | "fantach_hi_limit4" : 8, |
| 319 | "fantach_lo_limit5" : 8, |
| 320 | "fantach_hi_limit5" : 8, |
| 321 | |
| 322 | # 88 External temperature sensor host status |
| 323 | "ext_host_busy" : 1, |
| 324 | "ext_host_fnsh" : 1, |
| 325 | "ext_host_r_fcs_error" : 1, |
| 326 | "ext_host_w_fcs_error" : 1, |
| 327 | "ext_host_peci_highz" : 1, |
| 328 | "ext_host_sst_slave" : 1, |
| 329 | "ext_host_sst_bus" : 1, |
| 330 | "ext_host_data_fifo_clr": 1, |
| 331 | |
| 332 | "ext_host_target_addr" : 8, |
| 333 | "ext_host_write_length" : 8, |
| 334 | "ext_host_read_length" : 8, |
| 335 | "ext_host_cmd" : 8, |
| 336 | "ext_host_writedata" : 8, |
| 337 | |
| 338 | "ext_hostctl_start" : 1, |
| 339 | "ext_hostctl_sst_amdsi" : 1, |
| 340 | "ext_hostctl_sst_ctl" : 1, |
| 341 | "ext_hostctl_resetfifo" : 1, |
| 342 | "ext_hostctl_fcs_abort" : 1, |
| 343 | "ext_hostctl_start_en" : 1, |
| 344 | # Auto-Start Control |
| 345 | # The host will start the transaction |
| 346 | # at a regular rate automatically. |
| 347 | # 00: 32 Hz |
| 348 | # 01: 16 Hz |
| 349 | # 10: 8 Hz |
| 350 | # 11: 4 Hz |
| 351 | "ext_hostctl_start_ctl" : 2, |
| 352 | |
| 353 | "ext_host_readdata" : 8, |
| 354 | |
| 355 | "fan1_temp_limit_start" : 8, |
| 356 | "fan1_slope_pwm" : 7, |
| 357 | "fan1_temp_input_sel0" : 1, |
| 358 | "fan1_ctlmode_temp_ivl" : 5, |
| 359 | "fan1_ctlmode_target" : 2, |
| 360 | "fan1_temp_input_sel1" : 1, |
| 361 | "reserved93" : 8, |
| 362 | "fan2_temp_limit_start" : 8, |
| 363 | "fan2_slope_pwm" : 7, |
| 364 | "fan2_temp_input_sel0" : 1, |
| 365 | "fan2_ctlmode_temp_ivl" : 5, |
| 366 | "fan2_ctlmode_target" : 2, |
| 367 | "fan2_temp_input_sel1" : 1 |
| 368 | } |