| Teo Boon Tiong | f95daa5 | 2016-09-05 16:00:07 +0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2011 Advanced Micro Devices, Inc. |
| 5 | * Copyright (C) 2014 Felix Held <felix-coreboot@felixheld.de> |
| 6 | * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | */ |
| 18 | |
| 19 | #include <arch/io.h> |
| 20 | #include <device/device.h> |
| 21 | #include <device/pnp.h> |
| 22 | #include <pc80/keyboard.h> |
| 23 | #include <stdlib.h> |
| 24 | #include <superio/conf_mode.h> |
| 25 | |
| 26 | #include "nct6776.h" |
| 27 | |
| 28 | /* Both NCT6776D and NCT6776F package variants are supported. */ |
| 29 | |
| 30 | static void nct6776_init(struct device *dev) |
| 31 | { |
| 32 | if (!dev->enabled) |
| 33 | return; |
| 34 | |
| 35 | switch (dev->path.pnp.device) { |
| 36 | /* TODO: Might potentially need code for HWM or FDC etc. */ |
| 37 | case NCT6776_KBC: |
| 38 | pc_keyboard_init(NO_AUX_DEVICE); |
| 39 | break; |
| 40 | } |
| 41 | } |
| 42 | |
| 43 | static struct device_operations ops = { |
| 44 | .read_resources = pnp_read_resources, |
| 45 | .set_resources = pnp_set_resources, |
| 46 | .enable_resources = pnp_enable_resources, |
| 47 | .enable = pnp_alt_enable, |
| 48 | .init = nct6776_init, |
| 49 | .ops_pnp_mode = &pnp_conf_mode_8787_aa, |
| 50 | }; |
| 51 | |
| 52 | static struct pnp_info pnp_dev_info[] = { |
| 53 | { &ops, NCT6776_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, |
| 54 | {0x0ff8, 0}, }, |
| 55 | { &ops, NCT6776_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, |
| 56 | {0x0ff8, 0}, }, |
| 57 | { &ops, NCT6776_SP1, PNP_IO0 | PNP_IRQ0, |
| 58 | {0x0ff8, 0}, }, |
| 59 | { &ops, NCT6776_SP2, PNP_IO0 | PNP_IRQ0, |
| 60 | {0x0ff8, 0}, }, |
| 61 | { &ops, NCT6776_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, |
| 62 | {0x0fff, 0}, {0x0fff, 4}, }, |
| 63 | { &ops, NCT6776_CIR, PNP_IO0 | PNP_IRQ0, |
| 64 | {0x0ff8, 0}, }, |
| 65 | { &ops, NCT6776_ACPI}, |
| 66 | { &ops, NCT6776_HWM_FPLED, PNP_IO0 | PNP_IO1 | PNP_IRQ0, |
| 67 | {0x0ffe, 0}, {0x0ffe, 4}, }, |
| 68 | { &ops, NCT6776_VID}, |
| 69 | { &ops, NCT6776_CIRWKUP, PNP_IO0 | PNP_IRQ0, |
| 70 | {0x0ff8, 0}, }, |
| 71 | { &ops, NCT6776_GPIO_PP_OD}, |
| 72 | { &ops, NCT6776_SVID}, |
| 73 | { &ops, NCT6776_DSLP}, |
| 74 | { &ops, NCT6776_GPIOA_LDN}, |
| 75 | { &ops, NCT6776_WDT1}, |
| 76 | { &ops, NCT6776_GPIOBASE, PNP_IO0, |
| 77 | {0x0ff8, 0}, }, |
| 78 | { &ops, NCT6776_GPIO0}, |
| 79 | { &ops, NCT6776_GPIO1}, |
| 80 | { &ops, NCT6776_GPIO2}, |
| 81 | { &ops, NCT6776_GPIO3}, |
| 82 | { &ops, NCT6776_GPIO4}, |
| 83 | { &ops, NCT6776_GPIO5}, |
| 84 | { &ops, NCT6776_GPIO6}, |
| 85 | { &ops, NCT6776_GPIO7}, |
| 86 | { &ops, NCT6776_GPIO8}, |
| 87 | { &ops, NCT6776_GPIO9}, |
| 88 | { &ops, NCT6776_GPIOA}, |
| 89 | }; |
| 90 | |
| 91 | static void enable_dev(struct device *dev) |
| 92 | { |
| 93 | pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info); |
| 94 | } |
| 95 | |
| 96 | struct chip_operations superio_nuvoton_nct6776_ops = { |
| 97 | CHIP_NAME("NUVOTON NCT6776 Super I/O") |
| 98 | .enable_dev = enable_dev, |
| 99 | }; |