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Zheng Bao1088bbf2010-03-16 01:41:14 +00001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2010 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Zheng Bao1088bbf2010-03-16 01:41:14 +000014 */
15
16#ifndef RS780_CHIP_H
17#define RS780_CHIP_H
18
Uwe Hermannff492b12010-09-24 23:37:25 +000019/* Member variables are defined in devicetree.cb. */
Zheng Bao1088bbf2010-03-16 01:41:14 +000020struct southbridge_amd_rs780_config
21{
22 u8 gppsb_configuration; /* The configuration of General Purpose Port, A/B/C/D/E. */
23 u8 gpp_configuration; /* The configuration of General Purpose Port, C/D. */
24 u16 port_enable; /* Which port is enabled? GFX(2,3), GPP(4,5,6,7) */
25 u8 gfx_dev2_dev3; /* for GFX Core initialization REFCLK_SEL */
26 u8 gfx_dual_slot; /* Is it dual graphics slots */
27 u8 gfx_lane_reversal; /* Single/Dual slot lan reversal */
28 u8 gfx_tmds; /* whether support TMDS? */
29 u8 gfx_compliance; /* whether support compliance? */
Martin Rotha9e3a752014-12-16 20:52:23 -070030 u8 gfx_reconfiguration; /* Dynamic Link Width Control */
Zheng Bao1088bbf2010-03-16 01:41:14 +000031 u8 gfx_link_width; /* Desired width of lane 2 */
Kerry Shefaafd142011-05-07 08:51:32 +000032 u8 gfx_pcie_config; /* GFX PCIE Modes */
33 u8 gfx_ddi_config; /* GFX DDI Modes */
Zheng Bao1088bbf2010-03-16 01:41:14 +000034};
Zheng Bao1088bbf2010-03-16 01:41:14 +000035
36#endif /* RS780_CHIP_H */