Lee Leahy | d3de85c | 2016-02-20 17:15:33 -0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2009 coresystems GmbH |
| 5 | * Copyright (C) 2014 Google Inc. |
| 6 | * Copyright (C) 2015-2016 Intel Corporation. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; version 2 of the License. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | */ |
| 17 | |
| 18 | #include <soc/acpi.h> |
Lee Leahy | a6de547 | 2016-02-21 16:04:53 -0800 | [diff] [blame] | 19 | #include <soc/ramstage.h> |
Lee Leahy | d3de85c | 2016-02-20 17:15:33 -0800 | [diff] [blame] | 20 | |
| 21 | unsigned long acpi_fill_madt(unsigned long current) |
| 22 | { |
| 23 | return current; |
| 24 | } |
| 25 | |
| 26 | |
| 27 | unsigned long acpi_fill_mcfg(unsigned long current) |
| 28 | { |
| 29 | return current; |
| 30 | } |
| 31 | |
| 32 | void acpi_fill_in_fadt(acpi_fadt_t *fadt) |
| 33 | { |
Lee Leahy | a6de547 | 2016-02-21 16:04:53 -0800 | [diff] [blame] | 34 | struct device *dev = dev_find_slot(0, |
| 35 | PCI_DEVFN(PCI_DEVICE_NUMBER_QNC_LPC, |
| 36 | PCI_FUNCTION_NUMBER_QNC_LPC)); |
| 37 | uint32_t gpe0_base = pci_read_config32(dev, R_QNC_LPC_GPE0BLK) |
| 38 | & B_QNC_LPC_GPE0BLK_MASK; |
| 39 | uint32_t pmbase = pci_read_config32(dev, R_QNC_LPC_PM1BLK) |
| 40 | & B_QNC_LPC_PM1BLK_MASK; |
| 41 | |
| 42 | fadt->flags = ACPI_FADT_RESET_REGISTER | ACPI_FADT_PLATFORM_CLOCK; |
| 43 | |
| 44 | /* PM1 Status: ACPI 4.8.3.1.1 */ |
| 45 | fadt->pm1a_evt_blk = pmbase + R_QNC_PM1BLK_PM1S; |
| 46 | fadt->pm1_evt_len = 2; |
| 47 | |
| 48 | fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO; |
| 49 | fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8; |
| 50 | fadt->x_pm1a_evt_blk.bit_offset = 0; |
| 51 | fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_WORD_ACCESS; |
| 52 | fadt->x_pm1a_evt_blk.addrl = pmbase + R_QNC_PM1BLK_PM1S; |
| 53 | fadt->x_pm1a_evt_blk.addrh = 0x0; |
| 54 | |
| 55 | /* PM1 Control: ACPI 4.8.3.2.1 */ |
| 56 | fadt->pm1a_cnt_blk = pmbase + R_QNC_PM1BLK_PM1C; |
| 57 | fadt->pm1_cnt_len = 2; |
| 58 | |
| 59 | fadt->x_pm1a_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO; |
| 60 | fadt->x_pm1a_cnt_blk.bit_width = fadt->pm1_cnt_len * 8; |
| 61 | fadt->x_pm1a_cnt_blk.bit_offset = 0; |
| 62 | fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_WORD_ACCESS; |
| 63 | fadt->x_pm1a_cnt_blk.addrl = fadt->pm1a_cnt_blk; |
| 64 | fadt->x_pm1a_cnt_blk.addrh = 0x0; |
| 65 | |
| 66 | /* PM Timer: ACPI 4.8.3.3 */ |
| 67 | fadt->pm_tmr_blk = pmbase + R_QNC_PM1BLK_PM1T; |
| 68 | fadt->pm_tmr_len = 4; |
| 69 | |
| 70 | fadt->x_pm_tmr_blk.space_id = ACPI_ADDRESS_SPACE_IO; |
| 71 | fadt->x_pm_tmr_blk.bit_width = fadt->pm_tmr_len * 8; |
| 72 | fadt->x_pm_tmr_blk.bit_offset = 0; |
| 73 | fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS; |
| 74 | fadt->x_pm_tmr_blk.addrl = fadt->pm_tmr_blk; |
| 75 | fadt->x_pm_tmr_blk.addrh = 0x0; |
| 76 | |
| 77 | /* Reset Register: ACPI 4.8.3.6, 5.2.3.2 */ |
| 78 | fadt->reset_reg.space_id = ACPI_ADDRESS_SPACE_IO; |
| 79 | fadt->reset_reg.bit_width = 8; |
| 80 | fadt->reset_reg.bit_offset = 0; |
| 81 | fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; |
| 82 | fadt->reset_reg.addrl = 0xcf9; |
| 83 | fadt->reset_reg.addrh = 0; |
| 84 | |
| 85 | /* Soft/Warm Reset */ |
| 86 | fadt->reset_value = 6; |
| 87 | |
| 88 | /* General-Purpose Event 0 Registers: ACPI 4.8.4.1 */ |
| 89 | fadt->gpe0_blk = gpe0_base; |
| 90 | fadt->gpe0_blk_len = 4 * 2; |
| 91 | |
| 92 | fadt->x_gpe0_blk.space_id = ACPI_ADDRESS_SPACE_IO; |
| 93 | fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; |
| 94 | fadt->x_gpe0_blk.bit_offset = 0; |
| 95 | fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS; |
| 96 | fadt->x_gpe0_blk.addrl = fadt->gpe0_blk; |
| 97 | fadt->x_gpe0_blk.addrh = 0; |
| 98 | |
| 99 | /* Display the base registers */ |
Lee Leahy | f74ce24 | 2016-07-31 17:20:30 -0700 | [diff] [blame] | 100 | printk(BIOS_SPEW, "FADT:\n"); |
| 101 | printk(BIOS_SPEW, " 0x%08x: GPE0_BASE\n", gpe0_base); |
| 102 | printk(BIOS_SPEW, " 0x%08x: PMBASE\n", pmbase); |
| 103 | printk(BIOS_SPEW, " 0x%08x: RESET\n", fadt->reset_reg.addrl); |
Lee Leahy | a6de547 | 2016-02-21 16:04:53 -0800 | [diff] [blame] | 104 | |
Lee Leahy | d3de85c | 2016-02-20 17:15:33 -0800 | [diff] [blame] | 105 | } |