blob: 22c510435b36adc35a205f6d31619c178ac21c68 [file] [log] [blame]
Hannah Williamsba0fc472016-05-04 18:15:49 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2016 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#ifndef _INTEL_COMMON_SMI_H_
17#define _INTEL_COMMON_SMI_H_
18
19/*
20 * The register value is used with get_reg and set_reg
21 */
22enum smm_reg {
23 RAX,
24 RBX,
25 RCX,
26 RDX,
27};
28
29
30struct smm_save_state_ops {
31 /* return io_misc_info from SMM Save State Area */
32 uint32_t (*get_io_misc_info)(void *state);
33
34 /* return value of the requested register from
35 * SMM Save State Area
36 */
37 uint64_t (*get_reg)(void *state, enum smm_reg reg);
38
39 void (*set_reg)(void *state, enum smm_reg reg, uint64_t val);
40};
41
42typedef void (*smi_handler_t)(const struct smm_save_state_ops *save_state_ops);
43
44/*
45 * SOC SMI Handler has to provide this structure which has methods to access
46 * the SOC specific SMM Save State Area
47 */
48const struct smm_save_state_ops *get_smm_save_state_ops(void);
49
50/*
51 * southbridge_smi should be defined inside SOC specific code and should have
52 * handlers for any SMI events that need to be handled. Default handlers
53 * for some SMI events are provided in soc/intel/common/smihandler.c
54 */
55extern const smi_handler_t southbridge_smi[32];
56
57/*
58 * This function should be implemented in SOC specific code to handle
59 * the SMI event on SLP_EN. The default functionality is provided in
60 * soc/intel/common/smihandler.c
61 */
62void southbridge_smi_sleep(const struct smm_save_state_ops *save_state_ops);
63
64/*
65 * This function should be implemented in SOC specific code to handle
66 * SMI_APM event. The default functionality is provided in
67 * soc/intel/common/smihandler.c
68 */
69void southbridge_smi_apmc(const struct smm_save_state_ops *save_state_ops);
70
71/*
72 * This function should be implemented in SOC specific code to handle
73 * SMI_PM1 event. The default functionality is provided in
74 * soc/intel/common/smihandler.c
75 */
76void southbridge_smi_pm1(const struct smm_save_state_ops *save_state_ops);
77
78/*
79 * This function should be implemented in SOC specific code to handle
80 * SMI_GPE0 event. The default functionality is provided in
81 * soc/intel/common/smihandler.c
82 */
83void southbridge_smi_gpe0(const struct smm_save_state_ops *save_state_ops);
84
85/*
86 * This function should be implemented in SOC specific code to handle
87 * SMI_TCO event. The default functionality is provided in
88 * soc/intel/common/smihandler.c
89 */
90void southbridge_smi_tco(const struct smm_save_state_ops *save_state_ops);
91
92/*
93 * This function should be implemented in SOC specific code to handle
94 * SMI PERIODIC_STS event. The default functionality is provided in
95 * soc/intel/common/smihandler.c
96 */
97void southbridge_smi_periodic(const struct smm_save_state_ops *save_state_ops);
98
99/*
100 * This function returns a 1 or 0 depending on whether disable_busmaster
101 * needs to be done for the specified device on S5 entry
102 */
103int smm_disable_busmaster(device_t dev);
104
105/*
106 * Returns gnvs pointer within SMM context
107 */
108struct global_nvs_t *smm_get_gnvs(void);
109
110extern const struct smm_save_state_ops em64t100_smm_ops;
111
112extern const struct smm_save_state_ops em64t101_smm_ops;
113#endif