blob: 7ab712455744e6606188da8f70da7142ffbe07a8 [file] [log] [blame]
Marc Bertensea6772d2010-04-19 21:21:54 +00001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2010 Marc Bertens <mbertens@xs4all.nl>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Marc Bertensea6772d2010-04-19 21:21:54 +000015 */
16
17#include <stdint.h>
18#include <device/pci_def.h>
19#include <arch/io.h>
20#include <device/pnp_def.h>
Marc Bertensea6772d2010-04-19 21:21:54 +000021#include <stdlib.h>
Patrick Georgi12584e22010-05-08 09:14:51 +000022#include <console/console.h>
Edward O'Callaghan77757c22015-01-04 21:33:39 +110023#include <southbridge/intel/i82371eb/i82371eb.h>
24#include <northbridge/intel/i440bx/raminit.h>
Edward O'Callaghanebe3a7a2015-01-05 00:27:54 +110025#include <delay.h>
Edward O'Callaghan77757c22015-01-04 21:33:39 +110026#include <cpu/x86/bist.h>
Kyösti Mälkki07921540d2016-06-17 17:22:00 +030027#include <cpu/intel/romstage.h>
Edward O'Callaghanfdceb482014-06-02 07:58:14 +100028#include <superio/smsc/smscsuperio/smscsuperio.h>
Uwe Hermann6f2d20e2010-10-06 19:32:39 +000029#include <lib.h>
Marc Bertensea6772d2010-04-19 21:21:54 +000030
31#define SERIAL_DEV PNP_DEV(0x3f0, SMSCSUPERIO_SP1)
32
Uwe Hermann115c5b92010-10-09 17:00:18 +000033int spd_read_byte(unsigned int device, unsigned int address)
Marc Bertensea6772d2010-04-19 21:21:54 +000034{
35 return smbus_read_byte(device, address);
36}
37
Kyösti Mälkki07921540d2016-06-17 17:22:00 +030038void mainboard_romstage_entry(unsigned long bist)
Marc Bertensea6772d2010-04-19 21:21:54 +000039{
Marc Bertensea6772d2010-04-19 21:21:54 +000040 smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
Marc Bertensea6772d2010-04-19 21:21:54 +000041 console_init();
42 report_bist_failure(bist);
43
Marc Bertensea6772d2010-04-19 21:21:54 +000044 enable_smbus();
Uwe Hermann6f2d20e2010-10-06 19:32:39 +000045 dump_spd_registers();
Marc Bertensea6772d2010-04-19 21:21:54 +000046 sdram_set_registers();
47 sdram_set_spd_registers();
48 sdram_enable();
Marc Bertensea6772d2010-04-19 21:21:54 +000049}