Kyösti Mälkki | e75deb6 | 2014-06-26 09:12:54 +0300 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2012 Advanced Micro Devices, Inc. |
Dave Frodin | 83405a1 | 2014-06-05 11:49:04 -0600 | [diff] [blame] | 5 | * Copyright (C) 2014 Sage Electronic Engineering, LLC |
Kyösti Mälkki | e75deb6 | 2014-06-26 09:12:54 +0300 | [diff] [blame] | 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Kyösti Mälkki | e75deb6 | 2014-06-26 09:12:54 +0300 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | #include "AGESA.h" |
| 18 | #include "amdlib.h" |
| 19 | #include "Ids.h" |
| 20 | #include "heapManager.h" |
Kyösti Mälkki | 53052fe | 2016-04-27 09:04:11 +0300 | [diff] [blame] | 21 | #include <PlatformMemoryConfiguration.h> |
Kyösti Mälkki | e75deb6 | 2014-06-26 09:12:54 +0300 | [diff] [blame] | 22 | #include "Filecode.h" |
| 23 | |
| 24 | #include <northbridge/amd/agesa/agesawrapper.h> |
| 25 | |
| 26 | #define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE |
| 27 | |
| 28 | static const PCIe_PORT_DESCRIPTOR PortList [] = { |
| 29 | { |
Kyösti Mälkki | 9d035fa | 2015-05-23 14:27:44 +0300 | [diff] [blame] | 30 | 0, |
Kyösti Mälkki | e75deb6 | 2014-06-26 09:12:54 +0300 | [diff] [blame] | 31 | PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 3, 3), |
| 32 | PCIE_PORT_DATA_INITIALIZER_V2 (PortEnabled, ChannelTypeExt6db, 2, 5, |
| 33 | HotplugDisabled, |
| 34 | PcieGenMaxSupported, |
| 35 | PcieGenMaxSupported, |
| 36 | AspmDisabled, 0x01, 0) |
| 37 | }, |
| 38 | /* Initialize Port descriptor (PCIe port, Lanes 1, PCI Device Number 2, ...) */ |
| 39 | { |
Kyösti Mälkki | 9d035fa | 2015-05-23 14:27:44 +0300 | [diff] [blame] | 40 | 0, |
Kyösti Mälkki | e75deb6 | 2014-06-26 09:12:54 +0300 | [diff] [blame] | 41 | PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 2, 2), |
| 42 | PCIE_PORT_DATA_INITIALIZER_V2 (PortEnabled, ChannelTypeExt6db, 2, 4, |
| 43 | HotplugDisabled, |
| 44 | PcieGenMaxSupported, |
| 45 | PcieGenMaxSupported, |
| 46 | AspmDisabled, 0x02, 0) |
| 47 | }, |
| 48 | /* Initialize Port descriptor (PCIe port, Lanes 2, PCI Device Number 2, ...) */ |
| 49 | { |
Kyösti Mälkki | 9d035fa | 2015-05-23 14:27:44 +0300 | [diff] [blame] | 50 | 0, |
Kyösti Mälkki | e75deb6 | 2014-06-26 09:12:54 +0300 | [diff] [blame] | 51 | PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 1, 1), |
| 52 | PCIE_PORT_DATA_INITIALIZER_V2 (PortEnabled, ChannelTypeExt6db, 2, 3, |
| 53 | HotplugDisabled, |
| 54 | PcieGenMaxSupported, |
| 55 | PcieGenMaxSupported, |
| 56 | AspmDisabled, 0x03, 0) |
| 57 | }, |
| 58 | /* Initialize Port descriptor (PCIe port, Lanes 3, PCI Device Number 2, ...) */ |
| 59 | { |
| 60 | 0, |
| 61 | PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 0, 0), |
| 62 | PCIE_PORT_DATA_INITIALIZER_V2 (PortEnabled, ChannelTypeExt6db, 2, 2, |
| 63 | HotplugDisabled, |
| 64 | PcieGenMaxSupported, |
| 65 | PcieGenMaxSupported, |
| 66 | AspmDisabled, 0x04, 0) |
| 67 | }, |
| 68 | /* Initialize Port descriptor (PCIe port, Lanes 4-7, PCI Device Number 4, ...) */ |
| 69 | { |
Kyösti Mälkki | 9d035fa | 2015-05-23 14:27:44 +0300 | [diff] [blame] | 70 | DESCRIPTOR_TERMINATE_LIST, |
Kyösti Mälkki | e75deb6 | 2014-06-26 09:12:54 +0300 | [diff] [blame] | 71 | PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 4, 7), |
| 72 | PCIE_PORT_DATA_INITIALIZER_V2 (PortEnabled, ChannelTypeExt6db, 2, 1, |
| 73 | HotplugDisabled, |
| 74 | PcieGenMaxSupported, |
| 75 | PcieGenMaxSupported, |
| 76 | AspmDisabled, 0x05, 0) |
| 77 | } |
| 78 | }; |
| 79 | |
| 80 | static const PCIe_DDI_DESCRIPTOR DdiList [] = { |
| 81 | /* DP0 to HDMI0/DP */ |
| 82 | { |
| 83 | 0, |
| 84 | PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 8, 11), |
| 85 | PCIE_DDI_DATA_INITIALIZER (ConnectorTypeHDMI, Aux1, Hdp1) |
| 86 | }, |
| 87 | /* DP1 to FCH */ |
| 88 | { |
Dave Frodin | 83405a1 | 2014-06-05 11:49:04 -0600 | [diff] [blame] | 89 | DESCRIPTOR_TERMINATE_LIST, |
Kyösti Mälkki | e75deb6 | 2014-06-26 09:12:54 +0300 | [diff] [blame] | 90 | PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 12, 15), |
| 91 | PCIE_DDI_DATA_INITIALIZER (ConnectorTypeHDMI, Aux2, Hdp2) |
| 92 | }, |
Kyösti Mälkki | e75deb6 | 2014-06-26 09:12:54 +0300 | [diff] [blame] | 93 | }; |
| 94 | |
| 95 | static const PCIe_COMPLEX_DESCRIPTOR PcieComplex = { |
| 96 | .Flags = DESCRIPTOR_TERMINATE_LIST, |
| 97 | .SocketId = 0, |
| 98 | .PciePortList = PortList, |
| 99 | .DdiLinkList = DdiList |
| 100 | }; |
| 101 | |
| 102 | /*---------------------------------------------------------------------------------------*/ |
| 103 | /** |
| 104 | * OemCustomizeInitEarly |
| 105 | * |
| 106 | * Description: |
| 107 | * This is the stub function will call the host environment through the binary block |
| 108 | * interface (call-out port) to provide a user hook opportunity |
| 109 | * |
| 110 | * Parameters: |
| 111 | * @param[in] **PeiServices |
| 112 | * @param[in] *InitEarly |
| 113 | * |
| 114 | * @retval VOID |
| 115 | * |
| 116 | **/ |
| 117 | /*---------------------------------------------------------------------------------------*/ |
| 118 | |
| 119 | static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly) |
| 120 | { |
| 121 | AGESA_STATUS Status; |
| 122 | PCIe_COMPLEX_DESCRIPTOR *PcieComplexListPtr; |
| 123 | |
| 124 | ALLOCATE_HEAP_PARAMS AllocHeapParams; |
| 125 | |
| 126 | /* GNB PCIe topology Porting */ |
| 127 | |
| 128 | /* */ |
| 129 | /* Allocate buffer for PCIe_COMPLEX_DESCRIPTOR , PCIe_PORT_DESCRIPTOR and PCIe_DDI_DESCRIPTOR */ |
| 130 | /* */ |
| 131 | AllocHeapParams.RequestedBufferSize = sizeof(PcieComplex); |
| 132 | |
| 133 | AllocHeapParams.BufferHandle = AMD_MEM_MISC_HANDLES_START; |
| 134 | AllocHeapParams.Persist = HEAP_LOCAL_CACHE; |
| 135 | Status = HeapAllocateBuffer (&AllocHeapParams, &InitEarly->StdHeader); |
| 136 | ASSERT(Status == AGESA_SUCCESS); |
| 137 | |
| 138 | PcieComplexListPtr = (PCIe_COMPLEX_DESCRIPTOR *) AllocHeapParams.BufferPtr; |
| 139 | LibAmdMemCopy (PcieComplexListPtr, &PcieComplex, sizeof(PcieComplex), &InitEarly->StdHeader); |
| 140 | InitEarly->GnbConfig.PcieComplexList = PcieComplexListPtr; |
| 141 | return AGESA_SUCCESS; |
| 142 | } |
| 143 | |
| 144 | static AGESA_STATUS OemInitMid(AMD_MID_PARAMS * InitMid) |
| 145 | { |
| 146 | /* 0 iGpuVgaAdapter, 1 iGpuVgaNonAdapter; */ |
| 147 | InitMid->GnbMidConfiguration.iGpuVgaMode = 0; |
| 148 | return AGESA_SUCCESS; |
| 149 | } |
| 150 | |
Kyösti Mälkki | 53052fe | 2016-04-27 09:04:11 +0300 | [diff] [blame] | 151 | /*---------------------------------------------------------------------------------------- |
| 152 | * CUSTOMER OVERIDES MEMORY TABLE |
| 153 | *---------------------------------------------------------------------------------------- |
| 154 | */ |
| 155 | |
| 156 | /* |
| 157 | * Platform Specific Overriding Table allows IBV/OEM to pass in platform information to AGESA |
| 158 | * (e.g. MemClk routing, the number of DIMM slots per channel,...). If PlatformSpecificTable |
| 159 | * is populated, AGESA will base its settings on the data from the table. Otherwise, it will |
| 160 | * use its default conservative settings. |
| 161 | */ |
| 162 | CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { |
| 163 | #define SEED_A 0x12 |
| 164 | HW_RXEN_SEED( |
| 165 | ANY_SOCKET, CHANNEL_A, ALL_DIMMS, |
| 166 | SEED_A, SEED_A, SEED_A, SEED_A, SEED_A, SEED_A, SEED_A, SEED_A, |
| 167 | SEED_A), |
| 168 | |
| 169 | NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, ONE_DIMM), |
| 170 | NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, ONE_DIMM), |
| 171 | MOTHER_BOARD_LAYERS (LAYERS_6), |
| 172 | |
| 173 | MEMCLK_DIS_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00), |
| 174 | CKE_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x04, 0x08), /* TODO: bit2map, bit3map */ |
| 175 | ODT_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x04, 0x08), |
| 176 | CS_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x04, 0x08, 0x00, 0x00, 0x00, 0x00), |
| 177 | |
| 178 | PSO_END |
| 179 | }; |
| 180 | |
Kyösti Mälkki | e75deb6 | 2014-06-26 09:12:54 +0300 | [diff] [blame] | 181 | const struct OEM_HOOK OemCustomize = { |
| 182 | .InitEarly = OemInitEarly, |
| 183 | .InitMid = OemInitMid, |
| 184 | }; |