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Patrick Georgi4d6ad832015-06-22 19:43:18 +02001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2015 Google Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Patrick Georgi4d6ad832015-06-22 19:43:18 +020014 */
15
16#ifndef __MAINBOARD_GOOGLE_SMAUG_GPIO_H__
17#define __MAINBOARD_GOOGLE_SMAUG_GPIO_H__
18
19#include <gpio.h>
20#include <base3.h>
21
22/* Board ID definitions. */
23enum {
24 BOARD_REV0 = BASE3(0, 0),
25 BOARD_REV1 = BASE3(0, 1),
26 BOARD_REV2 = BASE3(0, Z),
27 BOARD_REV3 = BASE3(1, 0),
28 BOARD_REV4 = BASE3(1, 1),
29 BOARD_REV5 = BASE3(1, Z),
30 BOARD_REV6 = BASE3(Z, 0),
31 BOARD_REV7 = BASE3(Z, 1),
32 BOARD_REV8 = BASE3(Z, Z),
33
34 BOARD_ID_PROTO_0 = BOARD_REV0,
35 BOARD_ID_PROTO_1 = BOARD_REV1,
36 BOARD_ID_EVT = BOARD_REV2,
37 BOARD_ID_DVT = BOARD_REV3,
38 BOARD_ID_PVT = BOARD_REV4,
39 BOARD_ID_MP = BOARD_REV5,
40};
41
42enum {
43 /* Board ID related GPIOS. */
44 BD_ID0 = GPIO(K0),
45 BD_ID1 = GPIO(K1),
46
47 /* Warm reset */
48 AP_SYS_RESET_L = GPIO(M5),
49
50 /* Write Protect */
51 SPI_1V8_WP_L = GPIO(K2),
52 WRITE_PROTECT_L = SPI_1V8_WP_L,
53
54 /* Power button */
55 BTN_AP_PWR_L = GPIO(X5),
56 POWER_BUTTON = BTN_AP_PWR_L,
57
58 /* EC in RW signal */
59 EC_IN_RW = GPIO(E3),
60
61 /* Panel related GPIOs */
62 LCD_EN = GPIO(V1),
63 LCD_RST_L = GPIO(V2),
64 EN_VDD18_LCD = GPIO(V3),
65 EN_VDD_LCD = GPIO(V4),
66};
67
68#endif /* __MAINBOARD_GOOGLE_SMAUG_GPIO_H__ */