Uwe Hermann | 29c7dfca | 2010-12-13 13:44:33 +0000 | [diff] [blame] | 1 | ## |
| 2 | ## This file is part of the coreboot project. |
| 3 | ## |
| 4 | ## Copyright (C) 2010 Uwe Hermann <uwe@hermann-uwe.de> |
| 5 | ## |
| 6 | ## This program is free software; you can redistribute it and/or modify |
| 7 | ## it under the terms of the GNU General Public License as published by |
| 8 | ## the Free Software Foundation; either version 2 of the License, or |
| 9 | ## (at your option) any later version. |
| 10 | ## |
| 11 | ## This program is distributed in the hope that it will be useful, |
| 12 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | ## GNU General Public License for more details. |
| 15 | ## |
Uwe Hermann | 29c7dfca | 2010-12-13 13:44:33 +0000 | [diff] [blame] | 16 | |
| 17 | chip northbridge/amd/amdk8/root_complex # Root complex |
Stefan Reinauer | 0aa37c4 | 2013-02-12 15:20:54 -0800 | [diff] [blame] | 18 | device cpu_cluster 0 on # (L)APIC cluster |
Uwe Hermann | 29c7dfca | 2010-12-13 13:44:33 +0000 | [diff] [blame] | 19 | chip cpu/amd/socket_AM2 # CPU socket |
| 20 | device lapic 0 on end # Local APIC of the CPU |
| 21 | end |
| 22 | end |
Stefan Reinauer | 4aff445 | 2013-02-12 14:17:15 -0800 | [diff] [blame] | 23 | device domain 0 on # PCI domain |
Sven Schnelle | 9132102 | 2011-03-01 19:58:47 +0000 | [diff] [blame] | 24 | subsystemid 0x1043 0x8239 inherit |
Uwe Hermann | 29c7dfca | 2010-12-13 13:44:33 +0000 | [diff] [blame] | 25 | chip northbridge/amd/amdk8 # Northbridge / RAM controller |
| 26 | device pci 18.0 on # Link 0 == LDT 0 |
| 27 | chip southbridge/nvidia/mcp55 # Southbridge |
| 28 | device pci 0.0 on end # HT |
| 29 | device pci 1.0 on # LPC |
| 30 | chip superio/ite/it8716f # Super I/O |
| 31 | device pnp 2e.0 on # Floppy |
| 32 | io 0x60 = 0x3f0 |
| 33 | irq 0x70 = 6 |
| 34 | drq 0x74 = 2 |
| 35 | end |
| 36 | device pnp 2e.1 on # Com1 |
| 37 | io 0x60 = 0x3f8 |
| 38 | irq 0x70 = 4 |
| 39 | end |
| 40 | device pnp 2e.2 off # Com2 (N/A) |
| 41 | end |
| 42 | device pnp 2e.3 on # Parallel port |
| 43 | io 0x60 = 0x378 |
| 44 | io 0x62 = 0x000 |
| 45 | irq 0x70 = 7 |
| 46 | drq 0x74 = 4 |
| 47 | end |
| 48 | device pnp 2e.4 on # Environment controller |
| 49 | io 0x60 = 0x290 |
| 50 | io 0x62 = 0x000 |
| 51 | irq 0x70 = 0 |
| 52 | end |
| 53 | device pnp 2e.5 on # PS/2 keyboard |
| 54 | io 0x60 = 0x60 |
| 55 | io 0x62 = 0x64 |
| 56 | irq 0x70 = 1 # PS/2 keyboard IRQ |
| 57 | end |
| 58 | device pnp 2e.6 on # PS/2 mouse |
| 59 | irq 0x70 = 12 # PS/2 mouse IRQ |
| 60 | end |
| 61 | device pnp 2e.7 off # GPIO |
| 62 | io 0x60 = 0x0000 # SMI# Normal Run Access |
| 63 | io 0x62 = 0x800 # Simple I/O |
| 64 | io 0x64 = 0x0000 # Serial Flash I/F |
| 65 | end |
| 66 | device pnp 2e.8 off # MIDI (N/A) |
| 67 | end |
| 68 | device pnp 2e.9 off # Game port (N/A) |
| 69 | end |
| 70 | device pnp 2e.a off # Consumer IR (N/A) |
| 71 | end |
| 72 | end |
| 73 | end |
| 74 | device pci 1.1 on # SM 0 |
| 75 | chip drivers/generic/generic # DIMM 0-0-0 |
| 76 | device i2c 50 on end |
| 77 | end |
| 78 | chip drivers/generic/generic # DIMM 0-0-1 |
| 79 | device i2c 51 on end |
| 80 | end |
| 81 | chip drivers/generic/generic # DIMM 0-1-0 |
| 82 | device i2c 52 on end |
| 83 | end |
| 84 | chip drivers/generic/generic # DIMM 0-1-1 |
| 85 | device i2c 53 on end |
| 86 | end |
| 87 | end |
| 88 | device pci 2.0 on end # USB 1.1 |
| 89 | device pci 2.1 on end # USB 2 |
| 90 | device pci 4.0 on end # IDE |
| 91 | device pci 5.0 on end # SATA 0 |
| 92 | device pci 5.1 on end # SATA 1 |
| 93 | device pci 5.2 on end # SATA 2 |
| 94 | device pci 6.0 on end # PCI |
| 95 | device pci 6.1 on end # Azalia (HD Audio) |
| 96 | device pci 8.0 on end # NIC |
| 97 | device pci 9.0 off end # NIC (N/A) |
| 98 | device pci a.0 on end # PCI E 5 (PCIEX4) |
| 99 | device pci b.0 off end # PCI E 4 |
| 100 | device pci c.0 on end # PCI E 3 (PCIEX1_2) |
| 101 | device pci d.0 on end # PCI E 2 (PCIEX1_1) |
| 102 | device pci e.0 off end # PCI E 1 |
Uwe Hermann | a05ddbc | 2010-12-19 01:08:40 +0000 | [diff] [blame] | 103 | device pci f.0 on end # PCI E 0 (PCIEX16_1) |
Uwe Hermann | 29c7dfca | 2010-12-13 13:44:33 +0000 | [diff] [blame] | 104 | register "ide0_enable" = "1" # Primary IDE |
| 105 | register "ide1_enable" = "0" # Secondary IDE (N/A) |
| 106 | register "sata0_enable" = "1" |
| 107 | register "sata1_enable" = "1" |
| 108 | end |
| 109 | end |
| 110 | device pci 18.0 on end # Link 1 |
| 111 | device pci 18.0 on end |
| 112 | device pci 18.1 on end |
| 113 | device pci 18.2 on end |
| 114 | device pci 18.3 on end |
| 115 | end |
| 116 | end |
| 117 | end |