Marc Jones | 91135fe | 2016-09-20 20:36:08 -0600 | [diff] [blame] | 1 | # |
| 2 | # This file is part of the coreboot project. |
| 3 | # |
Marshall Dawson | 4bbea90 | 2016-10-08 09:53:58 -0600 | [diff] [blame] | 4 | # Copyright (C) 2015-2016 Advanced Micro Devices, Inc. |
Marc Jones | 91135fe | 2016-09-20 20:36:08 -0600 | [diff] [blame] | 5 | # |
| 6 | # This program is free software; you can redistribute it and/or modify |
| 7 | # it under the terms of the GNU General Public License as published by |
| 8 | # the Free Software Foundation; version 2 of the License. |
| 9 | # |
| 10 | # This program is distributed in the hope that it will be useful, |
| 11 | # but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | # GNU General Public License for more details. |
| 14 | # |
| 15 | chip northbridge/amd/pi/00670F00/root_complex |
| 16 | device cpu_cluster 0 on |
| 17 | chip cpu/amd/pi/00670F00 |
| 18 | device lapic 10 on end |
| 19 | end |
| 20 | end |
| 21 | |
| 22 | device domain 0 on |
| 23 | subsystemid 0x1022 0x1410 inherit |
| 24 | chip northbridge/amd/pi/00670F00 # CPU side of HT root complex |
| 25 | |
| 26 | chip northbridge/amd/pi/00670F00 # PCI side of HT root complex |
| 27 | device pci 0.0 on end # Root Complex |
| 28 | device pci 1.0 on end # Internal Graphics P2P bridge 0x98e4 |
| 29 | device pci 1.1 on end # Internal Multimedia |
| 30 | device pci 2.0 on end # PCIe Host Bridge |
| 31 | device pci 2.1 on end # x4 PCIe slot |
| 32 | device pci 2.2 on end # M.2 slot |
| 33 | device pci 2.3 on end # M.2 slot |
| 34 | device pci 2.4 on end # x1 PCIe slot |
| 35 | device pci 2.5 on end # Cardreader |
| 36 | end #chip northbridge/amd/pi/00670F00 |
| 37 | |
| 38 | chip southbridge/amd/pi/hudson # it is under NB/SB Link, but on the same pci bus |
| 39 | device pci 9.0 on end # PCIe Host Bridge |
| 40 | device pci 9.2 on end # HDA |
| 41 | device pci 10.0 on end # xHCI |
| 42 | device pci 11.0 on end # SATA |
| 43 | device pci 12.0 on end # EHCI |
| 44 | device pci 14.0 on # SM |
Marshall Dawson | 4bbea90 | 2016-10-08 09:53:58 -0600 | [diff] [blame] | 45 | chip drivers/generic/generic # dimm 0-0-0 |
Marc Jones | 91135fe | 2016-09-20 20:36:08 -0600 | [diff] [blame] | 46 | device i2c 51 on end |
| 47 | end |
| 48 | end # SM |
| 49 | device pci 14.3 on end # LPC 0x790e |
| 50 | device pci 14.7 on end # SD |
Marshall Dawson | f5d9d14 | 2016-12-16 12:53:53 -0500 | [diff] [blame] | 51 | end #chip southbridge/amd/pi/hudson |
Marc Jones | 91135fe | 2016-09-20 20:36:08 -0600 | [diff] [blame] | 52 | |
| 53 | device pci 18.0 on end |
| 54 | device pci 18.1 on end |
| 55 | device pci 18.2 on end |
| 56 | device pci 18.3 on end |
| 57 | device pci 18.4 on end |
| 58 | device pci 18.5 on end |
| 59 | register "spdAddrLookup" = " |
| 60 | { |
| 61 | { {0xA2, 0x00} }, // socket 0 - Channel 0, slots 0 & 1 |
| 62 | }" |
| 63 | |
| 64 | end #chip northbridge/amd/pi/00670F00 # CPU side of HT root complex |
| 65 | end #domain |
| 66 | end #northbridge/amd/pi/00670F00/root_complex |