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Kyösti Mälkki3ee16682014-02-17 19:37:52 +02001/*
2 * This file is part of the coreboot project.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
Kyösti Mälkki3ee16682014-02-17 19:37:52 +020012 */
13
14#include <console/console.h>
Kyösti Mälkki1d7541f2014-02-17 21:34:42 +020015#include <console/uart.h>
Kyösti Mälkki3ee16682014-02-17 19:37:52 +020016#if CONFIG_USE_OPTION_TABLE
Kyösti Mälkki919923d2014-01-28 10:02:53 +020017#include <option.h>
Kyösti Mälkki3ee16682014-02-17 19:37:52 +020018#include "option_table.h"
19#endif
20
21unsigned int default_baudrate(void)
22{
23#if !defined(__SMM__) && CONFIG_USE_OPTION_TABLE
24 static const unsigned baud[8] =
25 { 115200, 57600, 38400, 19200, 9600, 4800, 2400, 1200 };
26 unsigned b_index = 0;
27#if defined(__PRE_RAM__)
28 b_index = read_option(baud_rate, 0xff);
29#else
30 if (get_option(&b_index, "baud_rate") != CB_SUCCESS)
31 b_index = 0xff;
32#endif
33 if (b_index < 8)
34 return baud[b_index];
35#endif
36 return CONFIG_TTYS0_BAUD;
37}
38
39/* Calculate divisor. Do not floor but round to nearest integer. */
40unsigned int uart_baudrate_divisor(unsigned int baudrate,
41 unsigned int refclk, unsigned int oversample)
42{
43 return (1 + (2 * refclk) / (baudrate * oversample)) / 2;
44}
Lee Leahy14876212016-05-04 13:13:20 -070045
46#if !IS_ENABLED(CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER)
47unsigned int uart_input_clock_divider(void)
48{
49 /* Specify the default oversample rate for the UART.
50 *
51 * UARTs oversample the receive data. The UART's input clock first
52 * enters the baud-rate divider to generate the oversample clock. Then
53 * the UART typically divides the result by 16. The asynchronous
54 * receive data is synchronized with the oversample clock and when a
55 * start bit is detected the UART delays half a bit time using the
56 * oversample clock. Samples are then taken to verify the start bit and
57 * if present, samples are taken for the rest of the frame.
58 */
59 return 16;
60}
61#endif
Lee Leahy6ec72c92016-05-07 09:04:46 -070062
63#if !IS_ENABLED(CONFIG_UART_OVERRIDE_REFCLK)
64unsigned int uart_platform_refclk(void)
65{
66 /* Specify the default input clock frequency for the UART.
67 *
68 * The older UART's used an input clock frequency of 1.8432 MHz which
69 * with the 16x oversampling provided the maximum baud-rate of 115200.
70 * Specify this as maximum baud-rate multiplied by oversample so that
71 * it is obvious that the maximum baud rate is 115200 when divided by
72 * oversample clock. Also note that crystal on the board does not
73 * change when software selects another input clock divider.
74 */
75 return 115200 * 16;
76}
77#endif