Luc Verhaegen | 5c5beb7 | 2009-05-29 03:04:16 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2007-2009 Luc Verhaegen <libv@skynet.be> |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify it |
| 5 | * under the terms of the GNU General Public License as published by the Free |
| 6 | * Software Foundation; either version 2 of the License, or (at your option) |
| 7 | * any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
Luc Verhaegen | 5c5beb7 | 2009-05-29 03:04:16 +0000 | [diff] [blame] | 13 | */ |
| 14 | |
| 15 | /* |
| 16 | * All IO necessary to poke VGA registers. |
| 17 | */ |
| 18 | #include <pc80/vga_io.h> |
| 19 | |
| 20 | #include <arch/io.h> |
| 21 | |
| 22 | #define VGA_CR_INDEX 0x3D4 |
| 23 | #define VGA_CR_VALUE 0x3D5 |
| 24 | |
| 25 | #define VGA_SR_INDEX 0x3C4 |
| 26 | #define VGA_SR_VALUE 0x3C5 |
| 27 | |
| 28 | #define VGA_GR_INDEX 0x3CE |
| 29 | #define VGA_GR_VALUE 0x3CF |
| 30 | |
| 31 | #define VGA_AR_INDEX 0x3C0 |
| 32 | #define VGA_AR_VALUE_READ 0x3C1 |
| 33 | #define VGA_AR_VALUE_WRITE VGA_AR_INDEX |
| 34 | |
| 35 | #define VGA_MISC_WRITE 0x3C2 |
| 36 | #define VGA_MISC_READ 0x3CC |
| 37 | |
| 38 | #define VGA_ENABLE 0x3C3 |
| 39 | #define VGA_STAT1 0x3DA |
| 40 | |
| 41 | #define VGA_DAC_MASK 0x3C6 |
| 42 | #define VGA_DAC_READ_ADDRESS 0x3C7 |
| 43 | #define VGA_DAC_WRITE_ADDRESS 0x3C8 |
| 44 | #define VGA_DAC_DATA 0x3C9 |
| 45 | |
| 46 | /* |
| 47 | * VGA enable. Poke this to have the PCI IO enabled device accept VGA IO. |
| 48 | */ |
| 49 | unsigned char |
| 50 | vga_enable_read(void) |
| 51 | { |
| 52 | return inb(VGA_ENABLE); |
| 53 | } |
| 54 | |
| 55 | void |
| 56 | vga_enable_write(unsigned char value) |
| 57 | { |
| 58 | outb(value, VGA_ENABLE); |
| 59 | } |
| 60 | |
| 61 | void |
| 62 | vga_enable_mask(unsigned char value, unsigned char mask) |
| 63 | { |
| 64 | unsigned char tmp; |
| 65 | |
| 66 | tmp = vga_enable_read(); |
| 67 | tmp &= ~mask; |
| 68 | tmp |= (value & mask); |
| 69 | vga_enable_write(tmp); |
| 70 | } |
| 71 | |
| 72 | /* |
| 73 | * Miscellaneous register. |
| 74 | */ |
| 75 | unsigned char |
| 76 | vga_misc_read(void) |
| 77 | { |
| 78 | return inb(VGA_MISC_READ); |
| 79 | } |
| 80 | |
| 81 | void |
| 82 | vga_misc_write(unsigned char value) |
| 83 | { |
| 84 | outb(value, VGA_MISC_WRITE); |
| 85 | } |
| 86 | |
| 87 | void |
| 88 | vga_misc_mask(unsigned char value, unsigned char mask) |
| 89 | { |
| 90 | unsigned char tmp; |
| 91 | |
| 92 | tmp = vga_misc_read(); |
| 93 | tmp &= ~mask; |
| 94 | tmp |= (value & mask); |
| 95 | vga_misc_write(tmp); |
| 96 | } |
| 97 | |
| 98 | /* |
| 99 | * Sequencer registers. |
| 100 | */ |
| 101 | unsigned char |
| 102 | vga_sr_read(unsigned char index) |
| 103 | { |
| 104 | outb(index, VGA_SR_INDEX); |
| 105 | return (inb(VGA_SR_VALUE)); |
| 106 | } |
| 107 | |
| 108 | void |
| 109 | vga_sr_write(unsigned char index, unsigned char value) |
| 110 | { |
| 111 | outb(index, VGA_SR_INDEX); |
| 112 | outb(value, VGA_SR_VALUE); |
| 113 | } |
| 114 | |
| 115 | void |
| 116 | vga_sr_mask(unsigned char index, unsigned char value, unsigned char mask) |
| 117 | { |
| 118 | unsigned char tmp; |
| 119 | |
| 120 | tmp = vga_sr_read(index); |
| 121 | tmp &= ~mask; |
| 122 | tmp |= (value & mask); |
| 123 | vga_sr_write(index, tmp); |
| 124 | } |
| 125 | |
| 126 | /* |
| 127 | * CRTC registers. |
| 128 | */ |
| 129 | unsigned char |
| 130 | vga_cr_read(unsigned char index) |
| 131 | { |
| 132 | outb(index, VGA_CR_INDEX); |
| 133 | return (inb(VGA_CR_VALUE)); |
| 134 | } |
| 135 | |
| 136 | void |
| 137 | vga_cr_write(unsigned char index, unsigned char value) |
| 138 | { |
| 139 | outb(index, VGA_CR_INDEX); |
| 140 | outb(value, VGA_CR_VALUE); |
| 141 | } |
| 142 | |
| 143 | void |
| 144 | vga_cr_mask(unsigned char index, unsigned char value, unsigned char mask) |
| 145 | { |
| 146 | unsigned char tmp; |
| 147 | |
| 148 | tmp = vga_cr_read(index); |
| 149 | tmp &= ~mask; |
| 150 | tmp |= (value & mask); |
| 151 | vga_cr_write(index, tmp); |
| 152 | } |
| 153 | |
| 154 | /* |
| 155 | * Attribute registers. |
| 156 | */ |
| 157 | unsigned char |
| 158 | vga_ar_read(unsigned char index) |
| 159 | { |
| 160 | unsigned char ret; |
| 161 | |
| 162 | (void) inb(VGA_STAT1); |
| 163 | outb(index, VGA_AR_INDEX); |
| 164 | ret = inb(VGA_AR_VALUE_READ); |
| 165 | (void) inb(VGA_STAT1); |
| 166 | |
| 167 | return ret; |
| 168 | } |
| 169 | |
| 170 | void |
| 171 | vga_ar_write(unsigned char index, unsigned char value) |
| 172 | { |
| 173 | (void) inb(VGA_STAT1); |
| 174 | outb(index, VGA_AR_INDEX); |
| 175 | outb(value, VGA_AR_VALUE_WRITE); |
| 176 | (void) inb(VGA_STAT1); |
| 177 | } |
| 178 | |
| 179 | void |
| 180 | vga_ar_mask(unsigned char index, unsigned char value, unsigned char mask) |
| 181 | { |
| 182 | unsigned char tmp; |
| 183 | |
| 184 | tmp = vga_ar_read(index); |
| 185 | tmp &= ~mask; |
| 186 | tmp |= (value & mask); |
| 187 | vga_ar_write(index, tmp); |
| 188 | } |
| 189 | |
| 190 | /* |
| 191 | * Graphics registers. |
| 192 | */ |
| 193 | unsigned char |
| 194 | vga_gr_read(unsigned char index) |
| 195 | { |
| 196 | outb(index, VGA_GR_INDEX); |
| 197 | return (inb(VGA_GR_VALUE)); |
| 198 | } |
| 199 | |
| 200 | void |
| 201 | vga_gr_write(unsigned char index, unsigned char value) |
| 202 | { |
| 203 | outb(index, VGA_GR_INDEX); |
| 204 | outb(value, VGA_GR_VALUE); |
| 205 | } |
| 206 | |
| 207 | void |
| 208 | vga_gr_mask(unsigned char index, unsigned char value, unsigned char mask) |
| 209 | { |
| 210 | unsigned char tmp; |
| 211 | |
| 212 | tmp = vga_gr_read(index); |
| 213 | tmp &= ~mask; |
| 214 | tmp |= (value & mask); |
| 215 | vga_gr_write(index, tmp); |
| 216 | } |
| 217 | |
| 218 | /* |
| 219 | * DAC functions. |
| 220 | */ |
| 221 | void |
| 222 | vga_palette_enable(void) |
| 223 | { |
| 224 | (void) inb(VGA_STAT1); |
| 225 | outb(0x00, VGA_AR_INDEX); |
| 226 | (void) inb(VGA_STAT1); |
| 227 | } |
| 228 | |
| 229 | void |
| 230 | vga_palette_disable(void) |
| 231 | { |
| 232 | (void) inb(VGA_STAT1); |
| 233 | outb(0x20, VGA_AR_INDEX); |
| 234 | (void) inb(VGA_STAT1); |
| 235 | } |
| 236 | |
| 237 | unsigned char |
| 238 | vga_dac_mask_read(void) |
| 239 | { |
| 240 | return inb(VGA_DAC_MASK); |
| 241 | } |
| 242 | |
| 243 | void |
| 244 | vga_dac_mask_write(unsigned char mask) |
| 245 | { |
| 246 | outb(mask, VGA_DAC_MASK); |
| 247 | } |
| 248 | |
| 249 | void |
| 250 | vga_dac_read_address(unsigned char address) |
| 251 | { |
| 252 | outb(address, VGA_DAC_READ_ADDRESS); |
| 253 | } |
| 254 | |
| 255 | void |
| 256 | vga_dac_write_address(unsigned char address) |
| 257 | { |
| 258 | outb(address, VGA_DAC_WRITE_ADDRESS); |
| 259 | } |
| 260 | |
| 261 | unsigned char |
| 262 | vga_dac_data_read(void) |
| 263 | { |
| 264 | return inb(VGA_DAC_DATA); |
| 265 | } |
| 266 | |
| 267 | void |
| 268 | vga_dac_data_write(unsigned char data) |
| 269 | { |
| 270 | outb(data, VGA_DAC_DATA); |
| 271 | } |