blob: 337e751fb7055608e1c098a3ca32ee8b522b1ab2 [file] [log] [blame]
Martin Roth09dd70e2014-11-16 17:32:56 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2014 Sage Electronic Engineering, LLC.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Martin Roth09dd70e2014-11-16 17:32:56 -070014 */
15
16#ifndef FSP_VALUES_H
17#define FSP_VALUES_H
18
19#ifndef FSP_DEBUG_LEVEL
20# define FSP_DEBUG_LEVEL BIOS_SPEW
21#endif
22
23#ifndef FSP_INFO_LEVEL
24# define FSP_INFO_LEVEL BIOS_DEBUG
25#endif
26
27#define INCREMENT_FOR_DEFAULT(x) (x+1)
28
29#define UPD_DEFAULT 0x00
30#define UPD_DISABLE INCREMENT_FOR_DEFAULT(0)
31#define UPD_ENABLE INCREMENT_FOR_DEFAULT(1)
32#define UPD_USE_DEVICETREE 0xff
33
34#define UPD_SPD_ADDR_DEFAULT UPD_DEFAULT
35#define UPD_SPD_ADDR_DISABLED 0xFF
36
37#endif